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Author SHA1 Message Date
khluuandClaude Opus 4.6 154aa68e32 Fix: keep PYTORCH_NVML_BASED_CUDA_CHECK=1 on MIG
Setting PYTORCH_NVML_BASED_CUDA_CHECK=0 on MIG causes PyTorch to
use cudaGetDeviceCount() instead of NVML for device checks, which
initializes CUDA at import time. This breaks EngineCore's forked
subprocesses with "Cannot re-initialize CUDA in forked subprocess".

Keep NVML-based checks enabled (=1) on all platforms. Only set
expandable_segments:False on MIG.

Signed-off-by: khluu <khluu000@gmail.com>
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
2026-05-18 01:49:26 -07:00
khluuandClaude Opus 4.6 35c0231e94 [CI] Migrate 5 verified jobs to h200_18gb MIG + add MIG detection
Migrate only the CI jobs confirmed to pass on H200 18GB MIG partitions
across multiple validation builds (#65789, #65899). Also add MIG
detection and PyTorch env overrides to improve compatibility.

Migrated jobs (all pass consistently on 16GB MIG):
- Kernels KDA Test (pure kernel, no engine)
- LM Eval TurboQuant KV Cache (small quantized model)
- Python-only Installation (no GPU)
- Basic Models Tests (Initialization) (lightweight init)
- Language Models Tests (Standard) (core models fit in 16GB)

MIG detection changes:
- CudaPlatformBase.is_mig(): detects MIG via NVIDIA_VISIBLE_DEVICES
- env_override.py: on MIG, sets PYTORCH_NVML_BASED_CUDA_CHECK=0
  and expandable_segments:False to reduce NVML-related crashes

Why not migrate all gpu_1_queue jobs:
Most remaining jobs use 7B+ parameter models that need >16GB VRAM.
The H200 18GB MIG partition has ~16GB usable (vs 24GB on L4).
Tests that load Llama-3.1-8B, Ministral-8B, or similar models
simply don't fit. The NVML assertion error that appears is a
surface symptom — the root cause is insufficient GPU memory on
the MIG partition for these model sizes.

See full analysis: https://github.com/vllm-project/vllm/pull/42401

Signed-off-by: khluu <khluu000@gmail.com>
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
2026-05-13 02:36:30 -07:00
4 changed files with 24 additions and 0 deletions
+1
View File
@@ -7,6 +7,7 @@ steps:
timeout_in_minutes: 45
device: h200_18gb
torch_nightly: true
device: h200_18gb
source_file_dependencies:
- vllm/
- tests/models/test_initialization.py
@@ -6,6 +6,7 @@ steps:
key: language-models-tests-standard
timeout_in_minutes: 25
device: h200_18gb
device: h200_18gb
source_file_dependencies:
- vllm/
- tests/models/language
+12
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@@ -100,6 +100,18 @@ logger = init_logger(__name__)
# it avoids unintentional cuda initialization from torch.cuda.is_available()
os.environ["PYTORCH_NVML_BASED_CUDA_CHECK"] = "1"
# On MIG partitions, NVML access is restricted — PyTorch's
# CUDACachingAllocator hits an NVML assertion when it calls NVML
# internally during pool growth. Disable expandable_segments to
# reduce (but not eliminate) NVML-dependent code paths.
# Note: PYTORCH_NVML_BASED_CUDA_CHECK must stay "1" even on MIG,
# because setting it to "0" causes early CUDA initialization that
# breaks forked subprocesses.
_nvidia_visible = os.environ.get("NVIDIA_VISIBLE_DEVICES", "")
if _nvidia_visible.startswith("MIG-"):
os.environ.setdefault(
"PYTORCH_CUDA_ALLOC_CONF", "expandable_segments:False")
# see https://github.com/vllm-project/vllm/issues/10480 and
# https://github.com/vllm-project/vllm/issues/10619.
os.environ["TORCHINDUCTOR_COMPILE_THREADS"] = "1"
+10
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@@ -167,6 +167,16 @@ class CudaPlatformBase(Platform):
"RAY_EXPERIMENTAL_NOSET_CUDA_VISIBLE_DEVICES",
]
@classmethod
def is_mig(cls) -> bool:
"""Check if running on a MIG (Multi-Instance GPU) partition.
MIG partitions have restricted NVML access which can cause
PyTorch's CUDACachingAllocator to fail with NVML assertions.
"""
nvidia_visible = os.environ.get("NVIDIA_VISIBLE_DEVICES", "")
return nvidia_visible.startswith("MIG-")
@property
def supported_dtypes(self) -> list[torch.dtype]:
if self.has_device_capability(80):