[XPU] Fix FP8 block-scaled scheme selection on non-CUDA platforms (#43958)

Signed-off-by: Lai, Yejing <yejing.lai@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>

tests/quantization/test_compressed_tensors.py

@@ -480,6 +480,7 @@ def test_compressed_tensors_fp8_block_enabled(vllm_runner):
             assert input_quant_op._forward_method in (
                 input_quant_op.forward_cuda,
                 input_quant_op.forward_hip,
+                input_quant_op.forward_xpu,
             )
 
         llm.apply_model(check_model)

vllm/model_executor/layers/quantization/compressed_tensors/compressed_tensors.py

@@ -396,7 +396,7 @@ class CompressedTensorsConfig(QuantizationConfig):
                     )
             return supported
         else:
-            return False
+            return not match_exact
 
     @staticmethod
     def _is_nvfp4_format(quant_args: QuantizationArgs):