Nicolò LucchesiandGitHub 3034c8d389 [CI][PD] Add optional/nightly DSv4 Disaggregated eval (#42310) ...

Signed-off-by: NickLucche <nicolo.lucchesi@mistral.ai>

2026-07-15 21:04:54 +00:00

..

hardware_tests

[CI][ROCm] Retry failed Docker build steps once (#48773)

2026-07-15 14:31:23 -05:00

image_build

[Build/CI] Build arm64 PR and postmerge image builds for Blackwell SM10x and SM110 (#48041)

2026-07-10 10:12:50 -04:00

intel_jobs

[XPU][CI] Add tests/v1/e2e/general/test_correctness_sliding_window.py in Intel GPU CI (#47231)

2026-07-14 08:50:16 +00:00

lm-eval-harness

[CI][AMD] Configure MI300 tests for native execution without DinD (#48387)

2026-07-15 02:14:16 +00:00

performance-benchmarks

[Misc] Remove dead VLLM_RPC_TIMEOUT env var and fix profiling doc that references it (#44128)

2026-06-03 00:22:10 +00:00

scripts

[CI][ROCm] Stabilize ci_base hash calculation and image handoff (#48746)

2026-07-15 10:56:56 -05:00

test_areas

[CI][PD] Add optional/nightly DSv4 Disaggregated eval (#42310)

2026-07-15 21:04:54 +00:00

.pipeline_gen_v2

[CI] minor fixes to pipeline generator and tests (#33151)

2026-01-27 17:04:02 -08:00

check-wheel-size.py

[CI] Raise VLLM_MAX_SIZE_MB to 500 due to failing Build wheel - CUDA 12.9 (#26722)

2025-10-14 10:52:05 -07:00

ci_config_intel.yaml

[XPU][CI]Mv huggingface cache to larger disk in Intel GPU CI (#47405)

2026-07-03 11:56:17 +08:00

ci_config_rocm.yaml

[ROCm][CI] Refresh ROCm base images when docker rocm_base changes (#46904)

2026-07-07 03:10:50 -07:00

ci_config.yaml

[PD] Bump NIXL connector dependency to 1.x (#42364)

2026-05-12 18:05:01 -07:00

release-pipeline.yaml

[CI/Build] Split release artifact annotations by type (#48600)

2026-07-15 00:00:52 -07:00

test-amd.yaml

[CI][AMD] Configure MI300 tests for native execution without DinD (#48387)

2026-07-15 02:14:16 +00:00

test-pipeline.yaml

Deprecate test-pipeline.yaml (#34864)

2026-02-19 02:15:27 +00:00