4 people 06d020bb6e [Bugfix] Fix SM121 (DGX Spark) exclusion from Marlin/CUTLASS FP8 paths (#35568) ...

Signed-off-by: Blake Ledden <blake@secondnaturecomputing.com>
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
Co-authored-by: Pavani Majety <pmajety@nvidia.com>

2026-05-15 10:59:00 -07:00

..

fused_kernels

[ROCm] Enable fused_silu_mul_block_quant on ROCm (#38817)

2026-04-08 11:23:32 -05:00

gguf

[MoE] Move various experts classes to fused_moe/experts/ (#41979)

2026-05-11 07:54:33 +08:00

gptq

use HIP_VERSION variables to guard against duplicate atomicAdd definitions (#41802)

2026-05-08 18:44:37 -04:00

machete

[NVIDIA] Bugfix NVFP4 DGX Spark and RTX50 (#38423)

2026-03-30 09:36:18 -07:00

marlin

[Bugfix] Fix SM121 (DGX Spark) exclusion from Marlin/CUTLASS FP8 paths (#35568)

2026-05-15 10:59:00 -07:00

w8a8

[Bugfix] Fix broken explicit unquantized kv cache dtype support (#38922)

2026-04-09 22:27:53 -07:00

activation_kernels.cu

[Bugfix]fix output Nan/Inf in marlin if dtype=float16 (#33972)

2026-03-27 16:36:08 -07:00

utils.cuh

[Feature][ROCm]Enable fusion pass for torch.compile on ROCm (#15050)

2025-03-31 04:42:18 -07:00