 Divakar VermaandGitHub
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68ee8300a0
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[ROCm][CI]Fix test_concat_and_cache_mla_rope_fused on ROCm (#46409)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
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2026-06-27 12:38:13 +08:00 |
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Divakar VermaandGitHub
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00e045b7c7
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[ROCm][CI TG] refactor and fix deepep_moe test group (#46758)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
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2026-06-27 10:45:23 +08:00 |
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Divakar VermaandGitHub
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17a71d8702
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[ROCm][CI] Relax fused layernorm quant test tolerances for one-ULP outliers (#46658)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
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2026-06-27 10:44:29 +08:00 |
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MattandGitHub
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95e6442a6b
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[Hardware][AMD][CI] Fix Kernels Quantization test timeout (#46859)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
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2026-06-26 15:19:16 -05:00 |
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d980a3cc6e
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[ROCm] Fix AITER_UNIFIED_ATTN Dispatching After AITER Bump (#46780)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Co-authored-by: Rohan138 <rohanpotdar138@gmail.com>
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2026-06-26 02:09:56 -07:00 |
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fxmarty-amdandGitHub
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552a9dbe59
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[NVFP4][Emulation] Fuse NVFP4 weight dequantization with compute in triton kernel for w13/w2 MOE MLP linears (#44667)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
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2026-06-25 19:33:00 -07:00 |
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02a1f23711
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[DFlash] Fuse precompute kv per-layer rmsnorms (#46761)
Signed-off-by: Giancarlo Delfin <gdelfin@inferact.ai>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-25 19:32:07 -07:00 |
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e8c24a7695
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[Kernel] Vectorized fp32 moe_sum reduction and support any topk (#46643)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-06-25 14:02:28 -07:00 |
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9bfd878a48
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[MoE] [MoE Refactor] Add moe kernel oracle abc 37753 (#43461)
Signed-off-by: Qiuyang Yue <yueqiuyang1389@gmail.com>
Signed-off-by: qyYue1389 <yueqiuyang1389@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-25 09:34:03 -04:00 |
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1aad125815
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[CPU] Enable chunked prefill and prefix caching for qwen3.5 (#46202)
Signed-off-by: Li, Tianmu <tianmu.li@intel.com>
Co-authored-by: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-06-25 03:49:21 +00:00 |
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Kaihang JiangandGitHub
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fc7fc421e9
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[Kernel][MoE] Allow FlashInfer MXINT4 MoE for gated SiLU (#46518)
Signed-off-by: Kaihang Jiang <kaihangj@nvidia.com>
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2026-06-24 18:32:50 -05:00 |
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cyqandGitHub
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e06a83445c
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[Bugfix] Normalize slashes in Helion GPU names (#46101)
Signed-off-by: cyq <15000851237@163.com>
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2026-06-24 18:22:49 -05:00 |
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49f2104c53
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[Feature] Support DCP with FP8 KV cache in MLA decode path (#44044)
Signed-off-by: shivampr <shivampr.dev@gmail.com>
Signed-off-by: Shivam <shivamprasad91@gmail.com>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-24 19:28:17 +00:00 |
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b3a688cb9e
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[ROCm] Fix OOB During Model Warmup With ROCM_ATTN and MRV2 (#46548)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
Co-authored-by: Matthew Wong <Matthew.Wong2@amd.com>
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2026-06-24 10:53:21 -05:00 |
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Fadi ArafehandGitHub
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061043eaca
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[CPU][Perf] Accelerate unquantized MoE for AArch64 (#46353)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-06-24 14:14:35 +00:00 |
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Andreas KaratzasandGitHub
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549c7074cd
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[ROCm][CI] Skip the MoE Marlin tile-padding helper assertion (#46580)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-06-24 07:31:33 +00:00 |
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Roberto L. CastroandGitHub
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855cd4d787
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[Perf][DSv4/DSv3.2] Add cluster-cooperative topK kernel for low-latency scenarios (#43008)
Signed-off-by: LopezCastroRoberto <rocastro@redhat.com>
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2026-06-23 16:11:00 -07:00 |
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37a682d392
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[Kernel] Extend Marlin thread-tile padding to MoE (WNA16 + FP8/MXFP8) (#45703)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-06-23 11:45:10 -07:00 |
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6691f087a6
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[Minimax-M3] BF16/FP8 Indexer using MSA (#45892)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
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2026-06-23 10:28:49 -07:00 |
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84586c9acc
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[ROCm][CI] fix fp8 range in vit_fp8_quant (#46410)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
Signed-off-by: Divakar Verma <137818590+divakar-amd@users.noreply.github.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2026-06-23 11:34:21 -05:00 |
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Micah WilliamsonandGitHub
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156b12667c
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[ROCm][CI] Skip Quark mxfp4 tests unless Quark version is compatible with Torch version (#46431)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
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2026-06-23 22:26:39 +08:00 |
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c0b2d8f471
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[Bugfix] FusedMoE: coerce shape-(1,) per-tensor scales to 0-D scalar … (#43362)
Signed-off-by: Varshith <kvarshithgowda@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
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2026-06-22 13:26:53 -07:00 |
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Mohammad Miadh AngkadandGitHub
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d1a38c2762
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[Kernel][Performance] Add FlashInfer cutedsl NVFP4 GEMM backend (#42235)
Signed-off-by: Mohammad Miadh Angkad <176301910+mmangkad@users.noreply.github.com>
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2026-06-22 16:17:18 -04:00 |
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Yifan QiaoandGitHub
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aa4990a9a2
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[Attention] Re-enable cross-layer KV cache layout for MLA via stride-aware kernels (#45111)
Signed-off-by: Yifan Qiao <yifanqiao@inferact.ai>
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2026-06-22 06:57:02 -07:00 |
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Tuukka SarviandGitHub
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89accad2cc
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[ROCm][DSV4] Disable TileLang MHC dispatch on gfx942 (#45931)
Signed-off-by: Tuukka Sarvi <tuukka.sarvi@amd.com>
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2026-06-22 09:26:54 +00:00 |
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db32b53e30
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[SpecDecode] Support DFlash with FlashInfer (#43081)
Signed-off-by: gss <2783977641@qq.com>
Co-authored-by: gss <2783977641@qq.com>
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2026-06-22 04:55:30 +00:00 |
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MattandGitHub
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4f0d0049a0
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[Hardware][AMD][CI] Fix Kernels Attention test groups (#46080)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
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2026-06-21 17:10:51 -05:00 |
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MattandGitHub
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50241602fd
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[Hardware][AMD][CI] Fix gfx942 Kernels MoE test group (#46298)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
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2026-06-21 16:45:37 -05:00 |
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Jee Jee LiandGitHub
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745bba5ea8
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[Model]Fix MiniMaxM2ForCausalLM perf regression (#45935)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-06-22 00:28:52 +08:00 |
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JasonLi314andGitHub
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93bad11912
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[Bugfix] Fix gridDim.y overflow for large row counts (#45255)
Signed-off-by: Jason Li <li.jason.cs@gmail.com>
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2026-06-19 23:27:45 -04:00 |
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Micah WilliamsonandGitHub
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4a083cc858
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[ROCm][CI] Pin test_rocm_compressed_tensors_w8a8 to TRITON_ATTN (#46180)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
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2026-06-19 15:20:06 -05:00 |
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HumphreyandGitHub
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4583630b56
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[Bugfix][Kernel] Check output alignment in vectorize_with_alignment (fixes misaligned-address crash for non-multiple-of-8 head sizes) (#45466)
Signed-off-by: HumphreySun98 <humphreysun98@gmail.com>
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2026-06-18 16:58:22 +00:00 |
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afdcbd5d39
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[ROCm][DSv4] Functional fixes for DeepSeek V4 on MI300X/MI325X (#45681)
Signed-off-by: ganyi <ygan@amd.com>
Signed-off-by: Markus Hartikainen <markus.hartikainen@amd.com>
Signed-off-by: Tuukka Sarvi <tuukka.sarvi@amd.com>
Co-authored-by: ganyi <ygan@amd.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
Co-authored-by: Markus Hartikainen <markus.hartikainen@amd.com>
Co-authored-by: Jin Tao <jintao12@amd.com>
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2026-06-18 12:21:14 +00:00 |
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b4c80ec0fd
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[Refactor] Remove dead cutlass mxfp8 code (#44681)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: Shengqi Chen <harry-chen@outlook.com>
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2026-06-17 21:18:25 -07:00 |
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Wentao YeandGitHub
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2659f60a1a
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[Refactor] Remove dead quantization code and tests (#45454)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-06-17 16:12:01 -04:00 |
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Wentao YeandGitHub
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9c7c74bf10
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[Log] Update deepgemm log (#45857)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-06-17 15:34:22 +00:00 |
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46f74e144b
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[Kernel][Helion][1/N] Add Helion kernel for rms_norm_dynamic_per_token_quant (#34432)
Signed-off-by: Sean Chen <seachen@redhat.com>
Co-authored-by: Yanan Cao <gmagogsfm@gmail.com>
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2026-06-17 23:03:54 +08:00 |
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Wentao YeandGitHub
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0a7bacdcac
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[DSv4 Perf] DSv4 flashinfer sparse index cache for metadata, 2%~4% TTFT improvement (#45863)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-06-17 10:55:48 -04:00 |
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arghyadeep sarkarandGitHub
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93bbe94d3a
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[Kernel] Add weightless RMSNorm CUDA kernels for has_weight=False (#41430) (#44109)
Signed-off-by: hello-args <args.sarkar@gmail.com>
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2026-06-16 23:45:55 -07:00 |
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4c62663315
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[M3] Enable FP8 sparse GQA (#45744)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
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2026-06-16 21:38:03 -07:00 |
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5bdc01bcc3
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[M3] Tune Triton indexer score decode for spec-decode (#45743)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-16 21:07:34 -07:00 |
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liangel-02andGitHub
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20a5f8b43b
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[FlexAttention] make custom mask mods fully cudagraphable (#45232)
Signed-off-by: Angel Li <liangel@meta.com>
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2026-06-17 11:53:12 +08:00 |
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efd15e192a
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[Bugfix][ROCm] Fix MiniMax-M3 FP8 KV cache dtype (#45720)
Signed-off-by: Cam Quilici <cjquilici@gmail.com>
Signed-off-by: Cameron Quilici <cjquilici@gmail.com>
Co-authored-by: Hongxia Yang <62075498+hongxiayang@users.noreply.github.com>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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2026-06-17 03:14:45 +00:00 |
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ce3ef17bec
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[Kernel][Helion][1/N] Add Helion kernel for rms_norm_per_block_quant (#36895)
Signed-off-by: Sean Chen <seachen@redhat.com>
Co-authored-by: Yanan Cao <gmagogsfm@gmail.com>
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2026-06-16 22:09:52 +08:00 |
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Li, JiangandGitHub
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a7fdfeef72
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[CPU] Support Gemma Diffusion (#45690)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-06-16 14:39:56 +08:00 |
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Wentao YeandGitHub
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e18fe932ca
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[Perf] Optimize DSv4 prefill chunk planning, 4.0% E2E Throughput Improvement (#45061)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-06-15 19:50:21 +00:00 |
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+1
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0a1c5034f5
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[Model] Add MiniMax M3 support (#45381)
Signed-off-by: youkaichao <youkaichao@gmail.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
Signed-off-by: functionstackx <47992694+functionstackx@users.noreply.github.com>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Bugen Zhao <i@bugenzhao.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
Co-authored-by: functionstackx <47992694+functionstackx@users.noreply.github.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-06-16 01:01:25 +08:00 |
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5ed15f42b9
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Fix the E8M0 scale computation in the MXFP4 (W4A4) MOE CUTLASS kernel (#43557)
Signed-off-by: Xin He <xin3.he@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-06-15 06:04:54 -07:00 |
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Li, JiangandGitHub
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8760f972ca
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[CPU] Refine CPU attention frontend (#45391)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-06-14 19:26:54 -07:00 |
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Amanzhol SalykovandGitHub
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725c3bc808
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[ROCm][Perf] Enable W4A16 FlyDSL MoE (#44400)
Signed-off-by: amd-asalykov <asalykov@amd.com>
Signed-off-by: Amanzhol Salykov <asalykov@amd.com>
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2026-06-14 00:14:39 -07:00 |
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