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3 Commits
Author SHA1 Message Date
Tianmu LiGitHubClaude Sonnet 4.6Li, Jiang <jiang1.li@intel.com>
 		1aad125815 [CPU] Enable chunked prefill and prefix caching for qwen3.5 (#46202) 
Signed-off-by: Li, Tianmu <tianmu.li@intel.com>
Co-authored-by: Claude Sonnet 4.6 (1M context) <noreply@anthropic.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
 2026-06-25 03:49:21 +00:00
Li, JiangandGitHub b4601ad43f [CPU] Add fused GDN support for AMX CPU platform (#42707) 
Signed-off-by: jiang1.li <jiang1.li@intel.com>
 2026-05-18 03:04:36 -07:00
Li, JiangandGitHub b3945cc316 [CPU] Bump up to the latest CPU kernels (#41924) 
Signed-off-by: jiang1.li <jiang1.li@intel.com>
 2026-05-07 05:45:59 -07:00