 Andreas KaratzasandGitHub
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d28bdf9344
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[ROCm][CI] Fix ROCm LoRA Transformers fallback with full CUDA graphs (#41577)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-05-23 04:31:32 +00:00 |
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gnovackandGitHub
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f743254143
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DSv4 fused Q-norm kernel grid refactor (#42353)
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2026-05-22 15:21:33 -07:00 |
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Yongye ZhuandGitHub
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843715739b
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[Refactor] Extract DeepSeek V4 sparse MLA impl into model folder (#43149)
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2026-05-22 10:06:31 -07:00 |
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sychen52andGitHub
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fb21d8b4f9
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Add NVFP4 MOE support for Deepseek V4. (#42209)
Signed-off-by: Shiyang Chen <shiychen@nvidia.com>
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2026-05-22 07:21:51 -07:00 |
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68e07d5916
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[Bug] Fix ci issue assert output_size is not None AssertionError (#43261)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
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2026-05-21 16:58:09 +08:00 |
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Michael GoinandGitHub
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5774aad9c5
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[Perf][gpt-oss] Downgrade triton_kernels to v3.5.1 (#43135)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-05-20 14:13:12 -07:00 |
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363fc84407
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Integrate flashinfer b12x MoE and FP4 GEMM kernels for SM120/121 (#40082)
Signed-off-by: Meenakshi Venkataraman <meenakshiv@nvidia.com>
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
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2026-05-20 17:21:11 +00:00 |
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Dom BrownandGitHub
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d247a931cc
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[feat] Add FP8 per-tensor Q scale support to Triton attention backend (#42080)
Signed-off-by: Dom Brown <3886319+DomBrown@users.noreply.github.com>
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2026-05-19 09:02:05 -07:00 |
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Woosuk KwonandGitHub
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b14be81c1f
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[Model Refactoring] Move deepseek_v4_ops to models/deepseek_v4 [3/N] (#43073)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
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2026-05-19 00:52:54 -07:00 |
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3ca8db2ef8
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add cutedsl dsv4 indexer fp8 kernel (#42899)
Signed-off-by: george <george@inferact.ai>
Co-authored-by: george <george@inferact.ai>
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2026-05-18 21:17:56 -07:00 |
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Wentao YeandGitHub
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37ece593c1
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[Perf] Padded nvfp4 quant kernel to remove additional copy, 2.4%~5.7% e2e performance improvement (#42774)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-05-18 16:38:12 -07:00 |
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78e7a7b9b0
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Refactor AWQ Marlin MoE onto modular WNA16 oracle (#42483)
Signed-off-by: Siddharth Bedekar <bedeksid@gmail.com>
Signed-off-by: Siddharth Bedekar <104613085+bedeks@users.noreply.github.com>
Co-authored-by: Robert Shaw <robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-05-18 08:02:43 -07:00 |
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Yuwen ZhouandGitHub
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88a860d754
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[CPU] Add MXFP4 W4A16 MoE support (#41922)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
Signed-off-by: Yuwen Zhou <yuwen.zhou@intel.com>
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2026-05-18 03:04:45 -07:00 |
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0867497368
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[CI/Build] Bump flashinfer to v0.6.11.post2 (#41711)
Signed-off-by: Artem Perevedentsev <aperevedents@nvidia.com>
Co-authored-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
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2026-05-16 14:55:12 -07:00 |
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b2c58ee942
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[FlashAttn] Fix supports_kv_cache_dtype() accepting unhandled fp8 kv-cache dtype variants (#42685)
Signed-off-by: Lanze Liu <lanzetech@gmail.com>
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>
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2026-05-15 15:34:59 -04:00 |
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06d020bb6e
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[Bugfix] Fix SM121 (DGX Spark) exclusion from Marlin/CUTLASS FP8 paths (#35568)
Signed-off-by: Blake Ledden <blake@secondnaturecomputing.com>
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
Co-authored-by: Pavani Majety <pmajety@nvidia.com>
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2026-05-15 10:59:00 -07:00 |
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f351455f0f
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[CPU][RISC-V] Add RVV-optimized attention kernels for RISC-V Vector Extension (#40119)
Signed-off-by: liuyudong <liuyudong@iscas.ac.cn>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-05-15 12:08:23 +08:00 |
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f8848b2f2d
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[Bugfix] Add swiglu limits to deepgemm fp8 methods (#41986)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-05-14 15:43:13 -07:00 |
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a8887c208f
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[Bugfix] [ROCm] [DSV4] [Perf] Add aiter mhc support (#41946)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
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2026-05-13 21:43:15 +08:00 |
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3c413a5481
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Triton attention: add USE_TD constexpr for tensor descriptor Q/K/V load/store (#40327)
Signed-off-by: Artur Fierka <artur.fierka@intel.com>
Co-authored-by: quinnlp <quinnlp@users.noreply.github.com>
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2026-05-13 13:57:41 +02:00 |
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bnellnmandGitHub
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18f6bf5a21
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[MoE Refactor] Add sequence parallel tests to test_moe_layer.py (#41299)
Signed-off-by: Bill Nell <bnell@redhat.com>
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2026-05-12 21:52:19 -04:00 |
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d9b4990783
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[MoE Refactor] EPLB refactoring for FusedMoE (#41055)
Signed-off-by: Bill Nell <bnell@redhat.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
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2026-05-12 14:16:31 -04:00 |
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4d591db470
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[MoE Refactor] Introduce RoutedExperts alias for FusedMoE and don't store SharedExperts in MK (#40735)
Signed-off-by: Bill Nell <bnell@redhat.com>
Signed-off-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Signed-off-by: Robert Shaw <robertgshaw2@gmail.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: Robert Shaw <robertgshaw2@gmail.com>
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2026-05-12 13:37:44 -04:00 |
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bnellnmandGitHub
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6427603ae8
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[MoE Refactor] Move remaining experts classes to experts directory (#42334)
Signed-off-by: Bill Nell <bnell@redhat.com>
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2026-05-12 09:19:46 -04:00 |
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206eaed08d
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[MoE Refactor] Move expert map related code into ExpertMapManager class (#41046)
Signed-off-by: Bill Nell <bnell@redhat.com>
Signed-off-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Signed-off-by: Robert Shaw <robertgshaw2@gmail.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: Robert Shaw <robertgshaw2@gmail.com>
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2026-05-12 09:18:27 -04:00 |
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Hexiang WangandGitHub
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7863fff6e5
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[ROCm][DSv4] implement flash sparse mla with triton kernels (#41812)
Signed-off-by: whx-sjtu <xiaowang990929@gmail.com>
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2026-05-11 09:27:11 -07:00 |
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724ed2fc35
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[DSv4] Improved dequant gather K cache kernel (#42236)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
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2026-05-11 10:41:12 -04:00 |
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wangxiyuanandGitHub
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5536fc0c01
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[Misc] Replace mamba_type string literals with MambaAttentionBackendEnum (#41188)
Signed-off-by: wangxiyuan <wangxiyuan1007@gmail.com>
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2026-05-11 03:59:36 +00:00 |
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171019ab19
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add fused mhc_post_pre kernel (#41536)
Signed-off-by: george <george@inferact.ai>
Co-authored-by: george <george@inferact.ai>
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2026-05-10 19:56:52 -07:00 |
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1b57eb41f2
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[MoE] Move various experts classes to fused_moe/experts/ (#41979)
Signed-off-by: Jackmin801 <ongjackm@gmail.com>
Signed-off-by: Robert Shaw <robertgshaw2@gmail.com>
Signed-off-by: Jackmin801 <56836461+Jackmin801@users.noreply.github.com>
Signed-off-by: Bill Nell <bnell@redhat.com>
Co-authored-by: Jackmin801 <ongjackm@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Robert Shaw <robertgshaw2@gmail.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: Jackmin801 <56836461+Jackmin801@users.noreply.github.com>
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2026-05-11 07:54:33 +08:00 |
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Thien TranandGitHub
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530d371302
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[DSv4] Improved fused Indexer Q quant kernel (#41428)
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2026-05-09 01:20:32 -07:00 |
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Michael GoinandGitHub
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8bcd8a260c
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[Bugfix] Fix FlashInfer CUTLASS MXFP4-MXFP8 MoE by restoring swizzled scale (#42089)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-05-08 15:59:06 -07:00 |
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John CalderonandGitHub
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8a2fc80b84
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[CUDA][CUTLASS] Enable cutlass scaled mm for non-compatible sizes (#41868)
Signed-off-by: John Calderon <jcalderon@nvidia.com>
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2026-05-08 15:58:05 -07:00 |
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0b99971352
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[Kernel][Helion] Optimize Helion config parsing latency (#40850)
Signed-off-by: Yanan Cao <gmagogsfm@gmail.com>
Co-authored-by: Claude Sonnet 4 <noreply@anthropic.com>
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2026-05-07 20:27:34 -07:00 |
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Li, JiangandGitHub
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b3945cc316
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[CPU] Bump up to the latest CPU kernels (#41924)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-05-07 05:45:59 -07:00 |
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Yuwen ZhouandGitHub
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713b28bd0b
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[CPU] Add FP8 W8A16 MoE support (#41314)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
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2026-05-06 23:17:07 -07:00 |
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Yuwen ZhouandGitHub
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809b98e5b7
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[CPU] Add FP8 W8A16 linear support (#41186)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
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2026-05-06 07:05:27 +00:00 |
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628c436301
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[New Model][ROCm] Add AMD support for DeepSeek V4 (#40871)
Signed-off-by: ganyi <ygan@amd.com>
Signed-off-by: whx-sjtu <xiaowang990929@gmail.com>
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
Signed-off-by: tjtanaavllm <tunjian.tan@amd.com>
Co-authored-by: ganyi <ygan@amd.com>
Co-authored-by: tjtanaa <tunjian.tan@embeddedllm.com>
Co-authored-by: tjtanaavllm <tunjian.tan@amd.com>
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2026-05-05 08:55:37 -07:00 |
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Bowen BaoandGitHub
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1e9500410a
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[ROCm][Quantization][2/N] Refactor quark_moe w4a8 w/ oracle (#39136)
Signed-off-by: Bowen Bao <bowenbao@amd.com>
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2026-05-04 19:50:38 -07:00 |
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Luka GovedičandGitHub
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d58c42e19c
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[vLLM IR] 2/N fused_add_rms_norm and maybe_inplace overload (#36823)
Signed-off-by: Luka Govedič <lgovedic@redhat.com>
Signed-off-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
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2026-05-01 23:41:15 -04:00 |
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sychen52andGitHub
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947138b6c2
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Add nvfp4 kv cache support (#40177)
Signed-off-by: Shiyang Chen <shiychen@nvidia.com>
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2026-05-01 04:55:16 +00:00 |
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6b6ac6c3c7
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[Kernel][MoE] Support GELU on TRT-LLM NvFP4 fused MoE for Gemma4 (#41050)
Signed-off-by: Juhi Mittal <juhim@nvidia.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-05-01 03:37:43 +00:00 |
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a3c83ff2fd
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Faster per-token fp8 group quant packed kernel for blackwell (#41326)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
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2026-04-30 18:09:55 -07:00 |
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2917d6363a
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[NVFP4][Hopper/AMD Instinct] Add Triton kernels for NVFP4 dequantization and QDQ emulation (#40033)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-04-30 17:35:48 -04:00 |
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54146a9bf9
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[Bugfix] correct h matrix layout in chunk_kda output kernel (#40956)
Signed-off-by: ChenxiQian <chenxi.qian.cq@outlook.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-04-30 16:22:41 +08:00 |
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Thien TranandGitHub
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296741d025
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[DSv4] Use cvt PTX for FP32->FP4 conversion (#41015)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
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2026-04-29 16:16:40 -07:00 |
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22524f7a92
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[Feat] CPU fp8 attn for AMX/AVX-512 (#39445)
Signed-off-by: Li, Tianmu <tianmu.li@intel.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-04-29 20:43:21 +08:00 |
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ChaunceyandGitHub
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92879e12ba
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[CI] fix test_rotary_embedding_opcheck format error (#41202)
Signed-off-by: chaunceyjiang <chaunceyjiang@gmail.com>
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2026-04-29 00:32:37 -07:00 |
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Jee Jee LiandGitHub
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a269744e9f
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[Bugfix] Fix rope (#41113)
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
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2026-04-28 22:42:35 -07:00 |
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rasmithandGitHub
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856b15c62c
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[CI][AMD][BugFix] Patch has_flashinfer decorator for test_select_rocm_aiter_backend (#41072)
Signed-off-by: Randall Smith <Randall.Smith@amd.com>
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2026-04-29 02:12:17 +00:00 |
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