 haosdentandGitHub
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a377631d21
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[CI] Fix AMD docker build tests (#43329)
Signed-off-by: haosdent <haosdent@gmail.com>
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2026-05-22 14:06:24 +00:00 |
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Michael GoinandGitHub
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5774aad9c5
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[Perf][gpt-oss] Downgrade triton_kernels to v3.5.1 (#43135)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-05-20 14:13:12 -07:00 |
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f351455f0f
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[CPU][RISC-V] Add RVV-optimized attention kernels for RISC-V Vector Extension (#40119)
Signed-off-by: liuyudong <liuyudong@iscas.ac.cn>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-05-15 12:08:23 +08:00 |
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Matthew BonanniandGitHub
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dcacdf9a88
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[Attention] Sync FA with upstream (#41052)
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2026-05-12 23:34:18 -04:00 |
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Michael GoinandGitHub
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184577ae46
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[Build] DeepGEMM: trim comments, add integration notes + TODOs (#42429)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-05-12 15:57:58 -07:00 |
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d077622d60
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[Build] Build bundled DeepGEMM _C per-Python so the wheel imports on every CPython (#41516)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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2026-05-12 10:27:29 -04:00 |
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d6563d693c
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Require C++20 for compatibility with PyTorch (#40380)
Signed-off-by: Richard Barnes <rbarnes@meta.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-05-08 22:04:43 -07:00 |
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Li, JiangandGitHub
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b3945cc316
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[CPU] Bump up to the latest CPU kernels (#41924)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-05-07 05:45:59 -07:00 |
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e87e09a50a
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[Feat] dnnl build for AVX2 W8A8 Int8 (#41318)
Signed-off-by: Li, Tianmu <tianmu.li@intel.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-05-06 15:28:02 +08:00 |
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aee190ac37
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[Build] Fall back to system libgomp when torch has no vendored copy (#40575)
Signed-off-by: liuyudong <liuyudong@iscas.ac.cn>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-05-06 11:42:03 +08:00 |
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Michael GoinandGitHub
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0a9362d6ab
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Revert "[Build] Make bundled DeepGEMM wheel portable across Python versions" (#41512)
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2026-05-02 09:42:41 -07:00 |
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Michael GoinandGitHub
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0c99629ede
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[Build] Make bundled DeepGEMM wheel portable across Python versions (#41476)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-05-01 14:45:03 -07:00 |
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+8
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4d51588e23
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[Feat] DeepSeek V4 Rebased (#40860)
Signed-off-by: Yifan Qiao <yifanqiao@inferact.ai>
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
Signed-off-by: qizixi <zixi@inferact.ai>
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Yongye Zhu <yongye@inferact.ai>
Co-authored-by: Simon Mo <simon@inferact.ai>
Co-authored-by: Bugen Zhao <i@bugenzhao.com>
Co-authored-by: Giancarlo Delfin <gdelfin@inferact.ai>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
Co-authored-by: Nick Hill <nickhill123@gmail.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
Co-authored-by: Roy Wang <yasong.wang@inferact.ai>
Co-authored-by: Woosuk Kwon <woosuk@inferact.ai>
Co-authored-by: youkaichao <youkaichao@gmail.com>
Co-authored-by: Zhewen Li <jerven.vllm@gmail.com>
Co-authored-by: Zijing Liu <liuzijing2014@gmail.com>
Co-authored-by: khluu <khluu000@gmail.com>
Co-authored-by: qizixi <zixi@inferact.ai>
Co-authored-by: Zhewen Li <zhewenli@inferact.ai>
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2026-04-26 18:31:08 -07:00 |
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velonica0andGitHub
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ec7aafc02a
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[CPU][RISC-V] Support multiple RVV VLEN targets via compile-time dispatch (#39478)
Signed-off-by: velonica0 <like@mail.nankai.edu.cn>
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2026-04-20 14:36:59 +08:00 |
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Li, JiangandGitHub
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d02421a7db
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[CPU] Refactor CPU affinity and memory management (#39781)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-04-17 21:01:08 +08:00 |
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445b7093fd
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[perf][cpu] Accelerate BF16 GELU with LUT impl on Arm CPUs (#37469)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-04-15 22:26:17 -07:00 |
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Ganesh RandGitHub
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445a2a4d1a
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feat(cpu): add CPU support for draft model speculative decoding (#32662)
Signed-off-by: R <Ganesh.R@amd.com>
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2026-04-10 11:49:52 +08:00 |
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eb4205fee5
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[UX] Integrate DeepGEMM into vLLM wheel via CMake (#37980)
Signed-off-by: mgoin <mgoin64@gmail.com>
Signed-off-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-04-08 18:56:32 -07:00 |
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e24e0a43a4
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[Attention] relax the head dim 512 and paged kv for sm90+FA4 (#38835)
Signed-off-by: Siyuan Fu <siyuanf@nvidia.com>
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Lucas Wilkinson <lwilkins@redhat.com>
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2026-04-08 18:23:18 +00:00 |
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Matthew BonanniandGitHub
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308cec5864
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[FlashAttention] Symlink FA4 instead of copying when using VLLM_FLASH_ATTN_SRC_DIR (#38814)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
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2026-04-08 12:04:34 +00:00 |
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Lucas WilkinsonandGitHub
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cb3935a8fc
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[FA4] Update flash-attention to latest upstream FA4 (#38690)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
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2026-04-02 17:02:37 +00:00 |
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Yintong LuandGitHub
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f09daea261
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[CPU] Support int8 compute mode in CPU AWQ (#35697)
Signed-off-by: Yintong Lu <yintong.lu@intel.com>
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2026-03-31 15:27:37 +08:00 |
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+3
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97d19197bc
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[NVIDIA] Fix DGX Spark logic (#38126)
Signed-off-by: johnnynunez <johnnynuca14@gmail.com>
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
Signed-off-by: Nick Hill <nickhill123@gmail.com>
Signed-off-by: Mark McLoughlin <markmc@redhat.com>
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
Signed-off-by: Sathish Sanjeevi <sathish.krishnan.p.s@gmail.com>
Signed-off-by: guillaume_guy <guillaume.guy@airbnb.com>
Signed-off-by: Guillaume Guy <guillaume.c.guy@gmail.com>
Co-authored-by: Yongye Zhu <zyy1102000@gmail.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>
Co-authored-by: Nick Hill <nickhill123@gmail.com>
Co-authored-by: Mark McLoughlin <markmc@redhat.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>
Co-authored-by: Matthew Wong <Matthew.Wong2@amd.com>
Co-authored-by: Sathish Sanjeevi <SKPsanjeevi@users.noreply.github.com>
Co-authored-by: Guillaume Guy <guillaume.c.guy@gmail.com>
Co-authored-by: guillaume_guy <guillaume.guy@airbnb.com>
Co-authored-by: Cyrus Leung <cyrus.tl.leung@gmail.com>
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2026-03-27 15:26:07 -07:00 |
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4a76ad12e0
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[Bugfix] Preserve CUDA arch suffix (a/f) for SM12x — fixes NVFP4 NaN on desktop Blackwell (#37725)
Signed-off-by: Rob Tand <robert.tand@icloud.com>
Co-authored-by: Lucas Wilkinson <LucasWilkinson@users.noreply.github.com>
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2026-03-25 08:18:25 -07:00 |
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Jonas M. KüblerandGitHub
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77d2a5f17b
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pick up tuned prefill configs for FP8 FA3 (#36265)
Signed-off-by: Jonas M. Kübler <44084297+jmkuebler@users.noreply.github.com>
Signed-off-by: Jonas Kuebler <kuebj@amazon.com>
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2026-03-17 07:00:26 -07:00 |
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092ace9e3a
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[UX] Improve UX of CPU backend (#36968)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Signed-off-by: Li, Jiang <bigpyj64@gmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
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2026-03-14 09:27:29 +08:00 |
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Matthew BonanniandGitHub
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f444c05c32
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[Attention] Use FA4 for MLA prefill (#34732)
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
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2026-03-12 12:10:17 -04:00 |
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4184653775
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feat: add RISC-V support for CPU backend (v2) (#36578)
Signed-off-by: typer-J <2236066784@qq.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-03-10 21:51:39 -07:00 |
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Nikhil GuptaandGitHub
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0a49676fb0
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cpu: aarch64: Upgrade OneDNN for aarch64 to add support for int8 matmul (#36147)
Signed-off-by: Nikhil Gupta <nikhil.gupta2@arm.com>
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2026-03-06 03:48:59 +00:00 |
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f44d1ddc8c
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[BugFix] Fix cmake based incremental install (wrong vllm install dir) (#35773)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2026-03-02 21:58:16 -08:00 |
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8b5014d3dd
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[Attention] FA4 integration (#32974)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Signed-off-by: Lucas Wilkinson <LucasWilkinson@users.noreply.github.com>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
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2026-03-01 23:44:57 +00:00 |
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90805ff464
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[CI/Build] CPU release supports both of AVX2 and AVX512 (#35466)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Co-authored-by: jiang1.li <jiang1.li@intel.com>
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2026-02-28 04:35:21 +00:00 |
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bb85929aa6
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[BugFix] Fix Python 3.13 FlashMLA import error (#34548)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
Co-authored-by: Jee Jee Li <pandaleefree@gmail.com>
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2026-02-15 20:09:18 -08:00 |
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f07a128413
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[CPU][ARM] Add ARM BF16 cross-compilation support and improve documen… (#33079)
Signed-off-by: Maryam Tahhan <mtahhan@redhat.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-02-15 06:33:08 -08:00 |
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Lucas WilkinsonandGitHub
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c7914d30f9
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Reapply [Attention][FA3] Update FA3 to include new swizzle optimization (#34043)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
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2026-02-11 07:07:56 -08:00 |
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Andrey TalmanandGitHub
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f97ca67176
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[Release 2.10] Update to Torch 2.10 - final release (#30525)
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2026-02-08 13:51:09 -08:00 |
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Luka GovedičandGitHub
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e3bf79ffa0
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Revert "[Attention][FA3] Update FA3 to include new swizzle optimization" (#33841)
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2026-02-04 19:54:27 -08:00 |
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R3hankhanandGitHub
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4dffc5e044
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[CPU] Split attention dispatch by head_dim alignment (#32161)
Signed-off-by: Rehan Khan <Rehan.Khan7@ibm.com>
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2026-02-03 19:37:15 -08:00 |
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Lucas WilkinsonandGitHub
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2267cb1cfd
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[Attention][FA3] Update FA3 to include new swizzle optimization (#23465)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
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2026-02-03 08:08:47 -08:00 |
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203d0bc0c2
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[CPU] Improve CPU Docker build (#30953)
Signed-off-by: Maryam Tahhan <mtahhan@redhat.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-01-24 17:08:24 +00:00 |
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Fadi ArafehandGitHub
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744ef30484
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[CPU Backend] [Perf] Accelerate tensor-parallel/data-parallel inference across NUMA domains on Arm (#32792)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-01-22 18:55:23 +00:00 |
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Lucas WilkinsonandGitHub
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889722f3bf
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[FlashMLA] Update FlashMLA to expose new arguments (#32810)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
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2026-01-21 22:02:39 -07:00 |
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Lucas WilkinsonandGitHub
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b4f64e5b02
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Update FlashMLA (#32491)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
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2026-01-21 13:03:37 +08:00 |
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Lucas WilkinsonandGitHub
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be6a81f31b
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[chore] Update FA commit (#30460)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
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2026-01-07 23:24:18 -08:00 |
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Roberto L. CastroandGitHub
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fdcc5176be
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[BugFix] Fix architecture flags to prevent issues on SM103 (#31150)
Signed-off-by: LopezCastroRoberto <robertol.c510@gmail.com>
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2026-01-05 20:11:35 +00:00 |
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Li, JiangandGitHub
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e3ab93c896
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[CPU] Refactor CPU fused MOE (#30531)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-12-18 14:36:49 +08:00 |
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Shengqi ChenandGitHub
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511e81e7c9
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[BUILD] use sm_100f when compiling flashmla to fix support on sm103 (#30705)
Signed-off-by: Shengqi Chen <harry-chen@outlook.com>
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2025-12-15 14:48:01 -08:00 |
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Fadi ArafehandGitHub
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f355ad5412
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[CPU][FIX] Fix build failures on Arm CPUs with torch nightly (#30481)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-12-12 02:09:25 +00:00 |
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Radu SalavatandGitHub
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180345807f
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[CMake][Build]: Remove unused ACL CMake env variables (#30339)
Signed-off-by: Radu Salavat <radu.salavat@arm.com>
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2025-12-10 04:27:19 +00:00 |
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7c1ed45848
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[CI/Build]: make it possible to build with a free-threaded interpreter (#29241)
Signed-off-by: Ralf Gommers <ralf.gommers@gmail.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>
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2025-11-28 15:21:46 -08:00 |
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