 Ilya MarkovandGitHub
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6471ec75bd
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[EPLB] Reject NCCL-based EPLB communicators with async EPLB (#44978)
Signed-off-by: Markov Ilya <markovilya197@gmail.com>
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2026-06-10 19:51:27 +00:00 |
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32daf56b42
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[Refactor] Rename rocm_moe.py to rocm_moe_rdna.py (#45011)
Signed-off-by: JartX <sagformas@epdcenter.es>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-10 17:02:09 +08:00 |
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Jiangyun ZhuandGitHub
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7a89b72564
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[Perf] fuse qk rmsnorm rope gate for qwen3.5 (#44176)
Signed-off-by: zjy0516 <riverclouds.zhu@qq.com>
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2026-06-09 22:12:17 +08:00 |
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e2f993dc41
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[WideEP] Integrate DeepEP v2 (#41183)
Signed-off-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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2026-06-08 18:07:29 -07:00 |
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bnellnmandGitHub
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dc68bd8c41
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[MoE Refactor] FusedMoE/MoERunner inversion refactor (#41184)
Signed-off-by: Bill Nell <bnell@redhat.com>
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2026-06-08 10:42:58 -04:00 |
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Agata DobrzyniewiczandGitHub
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2ed0a9627b
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[Kernel][Test] Make kernel tests for mamba dual-HW (CUDA + XPU) (#42736)
Signed-off-by: Dobrzyniewicz, Agata <agata.dobrzyniewicz@intel.com>
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2026-06-08 08:22:47 +08:00 |
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062b05ff3a
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[ROCm][Perf] Fused MoE W4A16 HIP kernel for AMD RDNA3 (gfx1100) (#44075)
Signed-off-by: JartX <sagformas@epdcenter.es>
Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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2026-06-06 15:30:39 -05:00 |
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fa27d4e9cf
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[PERF] [Qwen3.5] Split mixed prefill+decode batches: route decodes to the recurrent kernel (#44700)
Signed-off-by: Vadim Gimpelson <vadim.gimpelson@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-06 22:13:50 +08:00 |
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38fd2405f3
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use split_group for pytorch process group creation (#41980)
Signed-off-by: Tushar Jain <tushar00jain@users.noreply.github.com>
Co-authored-by: Tushar Jain <tushar00jain@users.noreply.github.com>
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2026-06-04 14:36:07 -04:00 |
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Agata DobrzyniewiczandGitHub
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a947f7a420
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[Kernel][Test] Extend lightning_attn and awq_triton kernel tests to XPU (#43307)
Signed-off-by: Dobrzyniewicz, Agata <agata.dobrzyniewicz@intel.com>
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2026-06-04 14:25:59 -04:00 |
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bnellnmandGitHub
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439203d32c
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[Bugfix] Fix test_cutlass_moe.py (#44380)
Signed-off-by: Bill Nell <bnell@redhat.com>
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2026-06-04 14:18:52 -04:00 |
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06f94633e7
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[ROCm][CI] Add test for Aiter unified attn kernel (#44436)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-06-04 16:15:05 +00:00 |
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Michael GoinandGitHub
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06ee2d8433
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[Quant] Support compressed-tensors WNA8O8Int linears and WNInt embeddings (#44340)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-06-04 07:40:33 -07:00 |
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Yongye ZhuandGitHub
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b5235fca2e
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[DSv4] Adding TRTLLM gen attention kernel (#43827)
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2026-06-04 07:35:09 -07:00 |
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4f423bd5bc
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[EPLB] Nixl communicator optimization. Zero-copy transfers (#41633)
Signed-off-by: ilmarkov <markovilya197@gmail.com>
Signed-off-by: Markov Ilya <markovilya19@gmail.com>
Signed-off-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
Co-authored-by: Markov Ilya <markovilya19@gmail.com>
Co-authored-by: Nicolò Lucchesi <nlucches@redhat.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
Co-authored-by: Tyler Michael Smith <tlrmchlsmth@gmail.com>
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2026-06-04 03:40:34 +00:00 |
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Li, JiangandGitHub
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823d271c0d
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[Attention][CPU] Standardize kv layout to blocks first (#44393)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-06-03 19:03:09 +08:00 |
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Charlie FuandGitHub
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71df063c49
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Enable perf_token_group_quant/_C_stable_libtorch for ROCm (#42758)
Signed-off-by: charlifu <charlifu@amd.com>
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2026-06-02 23:23:28 -07:00 |
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3099de3617
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[Kernel][MoE] Add GELU_TANH to CPU, CUTLASS, and WNA16 MoE backends (#42027)
Signed-off-by: lesj0610 <lesj0610@users.noreply.github.com>
Co-authored-by: lesj0610 <lesj0610@users.noreply.github.com>
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2026-06-02 17:12:08 -04:00 |
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0b25cf4419
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[CPU][Perf] Enable fused kernels for GDN's gated delta rules (#43534)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-06-02 08:00:48 +00:00 |
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559d6710bf
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[PERF]MiniMax-M2 gate kernel (#38445)
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
Signed-off-by: qianlihuang <91178480+qianlihuang@users.noreply.github.com>
Co-authored-by: Yiliu Dong <91178480+qianlihuang@users.noreply.github.com>
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2026-05-29 18:28:34 -07:00 |
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bnellnmandGitHub
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7b98f498cd
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[MoE Refactor] Remove supports_expert_map (#43108)
Signed-off-by: Bill Nell <bnell@redhat.com>
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2026-05-29 17:26:56 -04:00 |
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JartXandGitHub
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0cff0741ff
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[Kernel][ROCm] Native W4A16 kernel for AMD RDNA3 (gfx1100) — fp16 + bf16 (#41394)
Signed-off-by: JartX <sagformas@epdcenter.es>
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2026-05-29 11:04:40 +00:00 |
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Woosuk KwonandGitHub
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7bd45da585
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[DSv4] Move mHC tilelang kernels & Don't use CustomOP in dsv4/nvidia (#43905)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
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2026-05-29 10:25:02 +08:00 |
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f3b2a819f7
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[Perf][KDA] Fuse gate softplus, chunk-local cumsum, and RCP_LN2 scaling (#43667)
Signed-off-by: haojiangzheng <justineric096@gmail.com>
Co-authored-by: haojiangzheng <justineric096@gmail.com>
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2026-05-28 13:47:08 +00:00 |
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Wentao YeandGitHub
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64e1218673
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[Perf] Optimize moe permute by pre-allocate buffer, 9~14% kernel performance improvement (#43014)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-05-28 06:18:26 -07:00 |
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TJianandGitHub
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0ba46d4b11
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[ROCm][DSV4] Enable Tilelang MHC replacing torch/triton mhc (#43679)
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
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2026-05-28 07:05:28 +00:00 |
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Thien TranandGitHub
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e54eff769d
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[Bugfix] Pass routed_scaling_factor to FlashInfer TRTLLM BF16 MoE (#43769)
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2026-05-27 21:29:14 -07:00 |
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Yongye ZhuandGitHub
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2d2c660104
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[MoE] Remove inplace fused experts mechanism (#43727)
Signed-off-by: Yongye Zhu <zyy1102000@gmail.com>
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2026-05-27 20:00:19 -07:00 |
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jatseng-aiandGitHub
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05c50c721e
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[ROCm] mori: add InterNodeV1LL inter-node kernel selection via VLLM_MORI_INTERNODE_KERNEL (#41751)
Signed-off-by: jatseng-ai <jatseng@amd.com>
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2026-05-28 00:33:32 +08:00 |
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Jee Jee LiandGitHub
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6e503868ca
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[Kernel] Porting fuse_minimax_qk_norm to manual fusion (#43410)
Signed-off-by: Jee Jee Li <jeejeelee@inferact.ai>
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2026-05-26 13:16:03 -07:00 |
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f51bbc694d
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[MoE Refactor] W4a8 int8 oracle (#42789)
Signed-off-by: Bill Nell <bnell@redhat.com>
Co-authored-by: Robert Shaw <114415538+robertgshaw2-redhat@users.noreply.github.com>
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2026-05-26 11:15:42 -04:00 |
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Yongye ZhuandGitHub
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6ab6ffb428
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[Feat][DSV4] Fuse q pad into deepseek v4 fused kernel (#43162)
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2026-05-26 05:12:54 -10:00 |
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Thien TranandGitHub
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d56612c621
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[GDN] GDN Prefill kernel for SM100 (#43273)
Signed-off-by: Thien Tran <gau.nernst@yahoo.com.sg>
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2026-05-26 14:02:11 +08:00 |
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d56285c747
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Tuning script and configs for Triton Mamba SSU kernel (#43083)
Signed-off-by: Banani Ghosh <bg2502@nyu.edu>
Signed-off-by: Daniel Serebrenik <daserebrenik@nvidia.com>
Co-authored-by: Banani Ghosh <bg2502@nyu.edu>
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2026-05-24 20:12:44 +03:00 |
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Andreas KaratzasandGitHub
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d28bdf9344
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[ROCm][CI] Fix ROCm LoRA Transformers fallback with full CUDA graphs (#41577)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-05-23 04:31:32 +00:00 |
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gnovackandGitHub
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f743254143
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DSv4 fused Q-norm kernel grid refactor (#42353)
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2026-05-22 15:21:33 -07:00 |
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Yongye ZhuandGitHub
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843715739b
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[Refactor] Extract DeepSeek V4 sparse MLA impl into model folder (#43149)
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2026-05-22 10:06:31 -07:00 |
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sychen52andGitHub
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fb21d8b4f9
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Add NVFP4 MOE support for Deepseek V4. (#42209)
Signed-off-by: Shiyang Chen <shiychen@nvidia.com>
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2026-05-22 07:21:51 -07:00 |
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68e07d5916
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[Bug] Fix ci issue assert output_size is not None AssertionError (#43261)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
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2026-05-21 16:58:09 +08:00 |
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Michael GoinandGitHub
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5774aad9c5
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[Perf][gpt-oss] Downgrade triton_kernels to v3.5.1 (#43135)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2026-05-20 14:13:12 -07:00 |
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363fc84407
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Integrate flashinfer b12x MoE and FP4 GEMM kernels for SM120/121 (#40082)
Signed-off-by: Meenakshi Venkataraman <meenakshiv@nvidia.com>
Co-authored-by: Claude Sonnet 4.6 <noreply@anthropic.com>
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2026-05-20 17:21:11 +00:00 |
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Dom BrownandGitHub
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d247a931cc
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[feat] Add FP8 per-tensor Q scale support to Triton attention backend (#42080)
Signed-off-by: Dom Brown <3886319+DomBrown@users.noreply.github.com>
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2026-05-19 09:02:05 -07:00 |
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Woosuk KwonandGitHub
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b14be81c1f
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[Model Refactoring] Move deepseek_v4_ops to models/deepseek_v4 [3/N] (#43073)
Signed-off-by: Woosuk Kwon <woosuk@inferact.ai>
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2026-05-19 00:52:54 -07:00 |
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3ca8db2ef8
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add cutedsl dsv4 indexer fp8 kernel (#42899)
Signed-off-by: george <george@inferact.ai>
Co-authored-by: george <george@inferact.ai>
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2026-05-18 21:17:56 -07:00 |
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Wentao YeandGitHub
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37ece593c1
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[Perf] Padded nvfp4 quant kernel to remove additional copy, 2.4%~5.7% e2e performance improvement (#42774)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-05-18 16:38:12 -07:00 |
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78e7a7b9b0
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Refactor AWQ Marlin MoE onto modular WNA16 oracle (#42483)
Signed-off-by: Siddharth Bedekar <bedeksid@gmail.com>
Signed-off-by: Siddharth Bedekar <104613085+bedeks@users.noreply.github.com>
Co-authored-by: Robert Shaw <robertgshaw2-redhat@users.noreply.github.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-05-18 08:02:43 -07:00 |
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Yuwen ZhouandGitHub
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88a860d754
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[CPU] Add MXFP4 W4A16 MoE support (#41922)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
Signed-off-by: Yuwen Zhou <yuwen.zhou@intel.com>
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2026-05-18 03:04:45 -07:00 |
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0867497368
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[CI/Build] Bump flashinfer to v0.6.11.post2 (#41711)
Signed-off-by: Artem Perevedentsev <aperevedents@nvidia.com>
Co-authored-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
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2026-05-16 14:55:12 -07:00 |
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b2c58ee942
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[FlashAttn] Fix supports_kv_cache_dtype() accepting unhandled fp8 kv-cache dtype variants (#42685)
Signed-off-by: Lanze Liu <lanzetech@gmail.com>
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Co-authored-by: Matthew Bonanni <mbonanni@redhat.com>
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2026-05-15 15:34:59 -04:00 |
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06d020bb6e
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[Bugfix] Fix SM121 (DGX Spark) exclusion from Marlin/CUTLASS FP8 paths (#35568)
Signed-off-by: Blake Ledden <blake@secondnaturecomputing.com>
Co-authored-by: Claude Opus 4.6 <noreply@anthropic.com>
Co-authored-by: Pavani Majety <pmajety@nvidia.com>
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2026-05-15 10:59:00 -07:00 |
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