 MattandGitHub
|
a2a92cbbaa
|
[Hardware][AMD][CI] Tweak mirrored tests; improve CI base dependency change detection (#46930)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
|
2026-06-28 00:07:14 -07:00 |
|
 
|
a65f93fb2e
|
[ROCm][CI] Add ci_base metadata for external cache orchestration (#46886)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Signed-off-by: Codex <codex@example.invalid>
Co-authored-by: Codex <codex@example.invalid>
|
2026-06-28 12:51:19 +08:00 |
|
 Li, JiangandGitHub
|
abc71548ef
|
[CI/Build][CPU] Add test image cache clean-up (#46831)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
|
2026-06-26 23:28:49 +08:00 |
|
 Bugen ZhaoandGitHub
|
ae7c8ec223
|
[Rust Frontend] Switch rustls to native-tls/OpenSSL (#46696)
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
|
2026-06-25 17:19:44 -07:00 |
|
![mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>](/assets/img/avatar_default.png) 
|
92221485aa
|
[CPU][CI/Build] Allow more CPU CI agents (#46702)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-06-25 19:33:39 +08:00 |
|
 Aarushi JainandGitHub
|
cf57311187
|
Run DeepSeek-V2-Lite prefetch-offload eval eager on ROCm (#46386)
Signed-off-by: aarushjain29 <Aarushi.Jain2@amd.com>
|
2026-06-24 12:25:57 -05:00 |
|
 Fadi ArafehandGitHub
|
061043eaca
|
[CPU][Perf] Accelerate unquantized MoE for AArch64 (#46353)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
|
2026-06-24 14:14:35 +00:00 |
|
 Kunshang JiandGitHub
|
d4448b511d
|
[XPU][Docker] switch to ubuntu 24.04 as base image (#45973)
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
|
2026-06-24 20:39:20 +08:00 |
|
 
|
568874fec2
|
[ROCm][CI] pass merge-base to container for python-only wheel metadata (#45869)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
|
2026-06-23 15:44:43 +00:00 |
|
 xiangdongandGitHub
|
b5a2adec4b
|
[XPU][CI]Skip v1/spec_decode/test_speculators_correctness.py in intel GPU nightly (#46356)
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
|
2026-06-22 19:30:41 +08:00 |
|
 Micah WilliamsonandGitHub
|
f3df7a7231
|
[ROCm][CI] Enable kv_connector unit tests on ROCm (#45955)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
|
2026-06-22 05:08:44 +03:00 |
|
 liuzhenweiandGitHub
|
2959a9273a
|
[XPU][CI] add model runner v2 into CI (#44650)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
|
2026-06-18 00:28:34 +00:00 |
|
 Kunshang JiandGitHub
|
ef2c40dc00
|
[XPU][CI] fix server test file path (#45870)
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
|
2026-06-17 09:06:25 +08:00 |
|
  
|
c69c73418a
|
[XPU][CI] add intel xpu cases for nightly CI (#44372)
Signed-off-by: wenjun.liu <wenjun.liu@intel.com>
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
Co-authored-by: zengxian <xiangdong.zeng@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
|
2026-06-16 16:35:08 +08:00 |
|
 
|
bd59c913bc
|
[CI] ci-fetch-log.sh: fetch all failed jobs from a build URL or PR number (#45274)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
|
2026-06-12 00:42:18 -07:00 |
|
 Bugen ZhaoandGitHub
|
43914dd743
|
[Rust Frontend] Add Python bridge for Rust tool parsers (#44624)
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
|
2026-06-11 04:51:06 +00:00 |
|
 xiangdongandGitHub
|
b12e42d132
|
[XPU][CI] Refine docker image build and pull/create lock mechanism in Intel GPU CI (#44481)
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
|
2026-06-09 20:20:32 +08:00 |
|
 xiangdongandGitHub
|
94fcdd007f
|
[XPU][CI] Add more test cases in Intel GPU CI (#43663)
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
|
2026-06-08 06:21:24 +00:00 |
|
 Andreas KaratzasandGitHub
|
967c5c3bc3
|
[ROCm][CI] Stage C mirrors (#42793)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
|
2026-06-07 23:00:59 -07:00 |
|
 Andreas KaratzasandGitHub
|
87954eb50e
|
[ROCm][CI] Optimize ROCm Docker build: registry cache, DeepEP, and ci-bake script (#36949)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
|
2026-06-02 23:43:07 -07:00 |
|
 
|
0b25cf4419
|
[CPU][Perf] Enable fused kernels for GDN's gated delta rules (#43534)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
|
2026-06-02 08:00:48 +00:00 |
|
 AlecandGitHub
|
816cc73a9b
|
[Bugfix][CI] Normalize NIXL connector CUDA wheel installs (#44266)
Signed-off-by: Alec Flowers <aflowers@nvidia.com>
|
2026-06-01 19:34:05 -07:00 |
|
  
|
4aaba00f92
|
[EPLB] Make async EPLB default (#43219)
Signed-off-by: Markov Ilya <markovilya19@gmail.com>
Co-authored-by: Markov Ilya <markovilya19@gmail.com>
Co-authored-by: Tyler Michael Smith <tyler@neuralmagic.com>
|
2026-05-29 18:07:16 +00:00 |
|
 yzong-rhandGitHub
|
325a1ec4fb
|
[CI] Enable prefix caching in BFCL benchmark (#43925)
Signed-off-by: Yifan Zong <yzong@redhat.com>
|
2026-05-28 23:36:31 +00:00 |
|
 Michael GoinandGitHub
|
03f03f9630
|
Refactor output filename handling in ci-fetch-log.sh (#43901)
Signed-off-by: Michael Goin <mgoin64@gmail.com>
|
2026-05-28 14:20:12 -07:00 |
|
 Andreas KaratzasandGitHub
|
33e94fc3ad
|
[ROCm][CI] Stabilize Cargo cache and pre-test image checks (#43815)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
|
2026-05-28 11:24:44 +08:00 |
|
     
|
39910f2b25
|
[Rust Frontend] Move code from vllm-frontend-rs (#43283)
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
Signed-off-by: Nick Hill <nickhill123@gmail.com>
Signed-off-by: Eric Curtin <eric.curtin@docker.com>
Signed-off-by: Dev-X25874 <283057883+Dev-X25874@users.noreply.github.com>
Signed-off-by: Will.hou <1205157517@qq.com>
Signed-off-by: Will.hou <willamhou@ceresman.com>
Co-authored-by: Nick Hill <nickhill123@gmail.com>
Co-authored-by: Eric Curtin <eric.curtin@docker.com>
Co-authored-by: Dev-X25874 <283057883+Dev-X25874@users.noreply.github.com>
Co-authored-by: Will.hou <1205157517@qq.com>
Co-authored-by: Will.hou <willamhou@ceresman.com>
Please see https://github.com/Inferact/vllm-frontend-rs for full original commit history.
|
2026-05-21 17:21:48 -07:00 |
|
 
|
5ecd8e9c70
|
[XPU][CI]Fix Docker image pull-to-run race in Intel GPU CI (#43266)
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
|
2026-05-21 10:41:38 +00:00 |
|
![mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>](/assets/img/avatar_default.png)  
|
c38bed4248
|
delete xpu ci (#42582)
Signed-off-by: wenjun.liu <wenjun.liu@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-05-18 16:36:45 +08:00 |
|
 Andreas KaratzasandGitHub
|
4db300e95f
|
[ROCm][CI] Removed problematic command override mechanism (#42807)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
|
2026-05-16 17:35:05 +08:00 |
|
 Cyrus LeungandGitHub
|
2676ab1e0b
|
[Deprecation] Remove old locations of get_tokenizer and resolve_hf_chat_template (#35024)
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
|
2026-05-15 00:13:32 -07:00 |
|
 
|
f6e868fbdf
|
[CI] Use uv with Python 3.12 for PyPI wheel upload (#42470)
Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
|
2026-05-13 02:12:06 -07:00 |
|
 Kevin H. LuuandGitHub
|
8c4fc4202a
|
[CI] Inline build artifact annotations in release pipeline (#42357)
Signed-off-by: khluu <khluu000@gmail.com>
|
2026-05-12 15:57:43 -07:00 |
|
![gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>](/assets/img/avatar_default.png) 
|
1d694e78c9
|
[Examples][last/6] Resettle examples. (#41084)
Signed-off-by: wang.yuqi <yuqi.wang@daocloud.io>
Signed-off-by: wang.yuqi <noooop@126.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
|
2026-05-07 19:42:12 -07:00 |
|
 Fadi ArafehandGitHub
|
b20731d0ae
|
[CI][Arm] skip e2e model tests if HF_TOKEN is not set (#41919)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
|
2026-05-07 11:31:50 +00:00 |
|
 
|
51f22dcfd0
|
[Feat][CPU] Enable Gated DeltaNet Attention (Qwen 3.5 / 3.6) (#41025)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Vadim Gimpelson <156319763+vadiklyutiy@users.noreply.github.com>
|
2026-05-07 12:57:09 +08:00 |
|
 Andreas KaratzasandGitHub
|
91740ca5ea
|
[ROCm][CI] Refine gating tests (#37243)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
|
2026-05-05 22:05:20 -07:00 |
|
 Andreas KaratzasandGitHub
|
4a8ae26e53
|
[ROCm][CI] Use vLLM generation defaults for DeepSeek prefetch-offload eval (#41575)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
|
2026-05-06 01:08:12 +00:00 |
|
 Kevin H. LuuandGitHub
|
1333864408
|
[CI] Automate Docker Hub release image publishing (#40415)
Signed-off-by: khluu <khluu000@gmail.com>
|
2026-05-06 00:15:23 +00:00 |
|
 
|
4f7309fcc0
|
[CI] Add ci-fetch-log.sh helper for Buildkite job logs (#41517)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
|
2026-05-02 15:23:59 -07:00 |
|
 yzong-rhandGitHub
|
93da1fe97a
|
[CI] Add temperature to bfcl eval, default greedy (#41059)
Signed-off-by: Yifan Zong <yzong@redhat.com>
|
2026-04-29 14:01:57 -07:00 |
|
 
|
3f1a4bb639
|
build: embed image provenance metadata in vLLM containers (#40653)
Signed-off-by: Alec Flowers <aflowers@nvidia.com>
Co-authored-by: OpenAI Codex <codex@openai.com>
|
2026-04-29 03:07:41 -07:00 |
|
 haosdentandGitHub
|
ef70057ca7
|
[CI][CPU] Split CPU-Distributed Tests into per-scenario labels (#41203)
Signed-off-by: haosdent <haosdent@gmail.com>
|
2026-04-29 01:28:45 -07:00 |
|
 
|
e48cb85185
|
[CI/Build] Auto-detect manylinux ABI tag for nightly wheels (#41149)
Signed-off-by: Shengqi Chen <harry-chen@outlook.com>
Co-authored-by: Claude <noreply@anthropic.com>
|
2026-04-29 00:37:14 -07:00 |
|
 xiangdongandGitHub
|
01acf96c6f
|
[XPU][CI] Fix Docker cleanup races on Intel CI runners (#40761)
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
|
2026-04-24 14:08:45 +08:00 |
|
 
|
3ed5231c6a
|
[Build] Switch default CUDA to 13.0, update CUDA architecture lists, clean up stale build-args (#39878)
Signed-off-by: Shengqi Chen <harry-chen@outlook.com>
Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
|
2026-04-23 15:51:28 +08:00 |
|
 
|
b2a5518679
|
[XPU][CI] Add misc, engine and lora cases on Intel GPU in CI (#39887)
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
|
2026-04-21 22:30:46 +08:00 |
|
 Sage MooreandGitHub
|
def8f52200
|
[CI][EPLB] Add Async EPLB end-to-end integration test to CI (#40168)
Signed-off-by: Sage Moore <sage@neuralmagic.com>
|
2026-04-20 10:22:54 -04:00 |
|
 Li, JiangandGitHub
|
d02421a7db
|
[CPU] Refactor CPU affinity and memory management (#39781)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
|
2026-04-17 21:01:08 +08:00 |
|
![mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>](/assets/img/avatar_default.png) 
|
445b7093fd
|
[perf][cpu] Accelerate BF16 GELU with LUT impl on Arm CPUs (#37469)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
|
2026-04-15 22:26:17 -07:00 |
|