 gausah01andGitHub
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26eb87204d
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[Bugfix] Fix CPU split-KV scratchpad sizing (#45844)
Signed-off-by: Gauri Sahnan <gauri.sahnan@arm.com>
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2026-07-04 06:47:23 +00:00 |
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c6554f321c
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[CPU] Fix macOS/Apple Silicon hang by enabling OpenMP in the build (#46769)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
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2026-06-26 14:32:21 -04:00 |
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Rukhaiya2004andGitHub
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9f5117820f
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[HARDWARE][POWER] Enable fp16 support for PowerPC (#46135)
Signed-off-by: Rukhaiya <bibirukhaiya123@gmail.com>
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2026-06-23 13:24:49 +00:00 |
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Li, JiangandGitHub
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a7fdfeef72
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[CPU] Support Gemma Diffusion (#45690)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-06-16 14:39:56 +08:00 |
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Li, JiangandGitHub
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8760f972ca
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[CPU] Refine CPU attention frontend (#45391)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-06-14 19:26:54 -07:00 |
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zhao, zhenhuiandGitHub
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771e1e48b1
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[CPU] Enable non-divisible GQA for decode workitems in mixed batches (#43032)
Signed-off-by: zhejiangxiaomai <zhenhui.zhao@intel.com>
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2026-05-26 14:15:47 +08:00 |
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cac81b6eda
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[CPU Backend] Improve cpu thread utilization (#42666)
Signed-off-by: Li, Tianmu <tianmu.li@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-05-18 03:04:41 -07:00 |
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f351455f0f
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[CPU][RISC-V] Add RVV-optimized attention kernels for RISC-V Vector Extension (#40119)
Signed-off-by: liuyudong <liuyudong@iscas.ac.cn>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-05-15 12:08:23 +08:00 |
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420b0a5c95
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[Hardware][Power]Add Power VSX Attention Backend and fix l2 Cache Crash (#40451)
Signed-off-by: Akash Kaothalkar <akashkaothalkar@akashs-mbp.bl1-in.ibm.com>
Signed-off-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Signed-off-by: Akash kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Akash Kaothalkar <akashkaothalkar@akashs-mbp.bl1-in.ibm.com>
Co-authored-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-05-04 20:51:09 -07:00 |
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22524f7a92
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[Feat] CPU fp8 attn for AMX/AVX-512 (#39445)
Signed-off-by: Li, Tianmu <tianmu.li@intel.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-04-29 20:43:21 +08:00 |
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2f314bc5e6
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[CPU] Added faster exp routine for lower precision data types. (#38112)
Signed-off-by: Anna Mayne <anna.mayne@arm.com>
Co-authored-by: Fadi Arafeh <fadi.arafeh@arm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-04-23 13:14:44 +00:00 |
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R3hankhanandGitHub
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4b7ca37bd4
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[CPU][IBM Z][Dockefile][Docs] Fix s390x builds for torch 2.11 and update docs for s390x (#39910)
Signed-off-by: Rehan Khan <Rehan.Khan7@ibm.com>
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2026-04-15 22:26:21 -07:00 |
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34ce0ffd1f
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[CPU][Perf] Accelerate Attention head for s390x using vector intrinsics (#34434)
Signed-off-by: Rehan Khan <Rehan.Khan7@ibm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
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2026-02-24 07:25:39 -08:00 |
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R3hankhanandGitHub
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d1b837f0ae
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[CPU] Enable FP16 (Half dtype) support for s390x (#34116)
Signed-off-by: Rehan Khan <Rehan.Khan7@ibm.com>
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2026-02-11 14:41:42 +08:00 |
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Gassan SalamaandGitHub
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1363e3d6d5
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[cpu][performance] CPU Paged Attention NEON BFMMLA BF16 Implementation (#32263)
Signed-off-by: Gassan <gassan.salama@arm.com>
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2026-02-06 15:01:48 +08:00 |
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Radu SalavatandGitHub
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e69c990c21
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[Feature][CPU Backend]: Optimize ARM vectorization backend (#30329)
Signed-off-by: Radu Salavat <radu.salavat@arm.com>
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2026-02-02 20:17:56 -08:00 |
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Li, JiangandGitHub
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e3ab93c896
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[CPU] Refactor CPU fused MOE (#30531)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-12-18 14:36:49 +08:00 |
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3bdd426636
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Fix typos in comments across multiple files (#30345)
Signed-off-by: Wilson Wu <iwilsonwu@gmail.com>
Co-authored-by: Wentao Ye <44945378+yewentao256@users.noreply.github.com>
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2025-12-09 20:05:28 -08:00 |
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9843e332da
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[CPU][Perf] Add fast vectorized exp impl from Arm Optimized Routines (#30068)
Signed-off-by: Ubuntu <ubuntu@ip-10-252-30-150.eu-west-1.compute.internal>
Signed-off-by: Elham Harirpoush <elham.harirpoush@arm.com>
Co-authored-by: Ubuntu <ubuntu@ip-10-252-30-150.eu-west-1.compute.internal>
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2025-12-05 13:09:20 +00:00 |
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R3hankhanandGitHub
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4de87866a8
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[CPU][IBM Z] Fix BF16 support and vectorize math operations for s390x (#28926)
Signed-off-by: Rehan Khan <Rehan.Khan7@ibm.com>
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2025-11-24 12:08:09 +00:00 |
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Fadi ArafehandGitHub
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730bd35378
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[perf][cpu] Accelerate paged attention GEMMs (QK, PV) on Arm CPUs with NEON (#29193)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2025-11-22 09:04:36 -08:00 |
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Li, JiangandGitHub
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20852c8f4c
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[CPU] Refactor CPU WNA16 (#28826)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-11-19 10:32:00 +08:00 |
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tiehexueandGitHub
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e42bd8c2e3
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Cast return value to int64_t for cache size (#28814)
Signed-off-by: tiehexue <tiehexue@hotmail.com>
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2025-11-17 16:02:32 +00:00 |
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Michael GoinandGitHub
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622e6106a9
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[CPU][Bugfix] Fix Apple Silicon M1 compilation failure (#28681)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-11-14 09:49:55 +08:00 |
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86d15bfd8d
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[Hardware][PowerPC] Fix fp16 compilation error for Power in cpu attention backend and bump oneDNN version (#28535)
Signed-off-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
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2025-11-13 13:32:21 +00:00 |
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Li, JiangandGitHub
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7f829be7d3
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[CPU] Refactor CPU attention backend (#27954)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2025-11-12 09:43:06 +08:00 |
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