 Bugen ZhaoandOpenAI Codex
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e1a763558c
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[CI] Discover Rust coverage artifacts from build metadata
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-07-23 06:44:16 +00:00 |
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Bugen ZhaoandOpenAI Codex
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84aeec9f22
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[CI] Simplify Rust coverage reporting
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-07-22 08:18:14 +00:00 |
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Bugen ZhaoandOpenAI Codex
|
82a770ddbd
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[CI] Simplify Rust coverage aggregation
Co-authored-by: OpenAI Codex <codex@openai.com>
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2026-07-22 02:58:45 +00:00 |
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Bugen Zhao
|
a09a9bace1
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[CI] Disable redundant Codecov file fixes
|
2026-07-21 13:57:38 +00:00 |
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Bugen Zhao
|
6c20d467a2
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[CI] Run Codecov from repository root
|
2026-07-21 13:34:22 +00:00 |
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Bugen ZhaoandOpenAI Codex
|
cb59d0a351
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[CI] Collect Rust coverage in Buildkite
Co-authored-by: OpenAI Codex <codex@openai.com>
|
2026-07-21 13:01:56 +00:00 |
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5c9f6557d7
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[Hardware][CPU] Enable granite-4 model on cpu (#47641)
Signed-off-by: Akash Kaothalkar <akashkaothalkar@akashs-mbp.bl1-in.ibm.com>
Signed-off-by: Akash Kaothalkar <akashkaothalkar@dhcp-9-123-5-76.bl1-in.ibm.com>
Signed-off-by: Akash Kaothalkar <akashkaothalkar@Akashs-MBP.lan>
Signed-off-by: Akash kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Akash Kaothalkar <akashkaothalkar@dhcp-9-123-5-76.bl1-in.ibm.com>
Co-authored-by: Akash Kaothalkar <akashkaothalkar@Akashs-MBP.lan>
Co-authored-by: Akash Kaothalkar <akashkaothalkar@akashs-mbp.bl1-in.ibm.com>
Co-authored-by: Akash kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Li, Jiang <jiang1.li@intel.com>
|
2026-07-20 06:15:16 +00:00 |
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867ff69733
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[CI] Gate non-default release wheel builds (#48772)
Signed-off-by: khluu <khluu000@gmail.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
|
2026-07-17 02:16:44 -07:00 |
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Andreas KaratzasandGitHub
|
0885b51981
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[CI][ROCm] Stabilize ci_base hash calculation and image handoff (#48746)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-15 10:56:56 -05:00 |
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12a8057bfe
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[CI/Build] Split release artifact annotations by type (#48600)
Signed-off-by: khluu <khluu000@gmail.com>
Co-authored-by: OpenAI Codex <noreply@openai.com>
|
2026-07-15 00:00:52 -07:00 |
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Andreas KaratzasandGitHub
|
3ad85e0de4
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[CI][AMD] Configure MI300 tests for native execution without DinD (#48387)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
|
2026-07-15 02:14:16 +00:00 |
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Michael GoinandGitHub
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0b54201a04
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[CI] Build macOS arm64 CPU wheel natively on the macmini queue (#48289)
Signed-off-by: mgoin <mgoin64@gmail.com>
|
2026-07-14 19:40:26 +00:00 |
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xiangdongandGitHub
|
0a9396a25e
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[XPU][CI] Add tests/v1/e2e/general/test_correctness_sliding_window.py in Intel GPU CI (#47231)
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
Signed-off-by: xiangdong <40376367+zxd1997066@users.noreply.github.com>
|
2026-07-14 08:50:16 +00:00 |
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b7b58d1eba
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[ROCm][CI] Cache Rust builds by source inputs (#46527)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
Co-authored-by: Matthew Wong <Matthew.Wong2@amd.com>
|
2026-07-13 01:14:08 -05:00 |
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Bugen ZhaoandGitHub
|
27c3e579f0
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[CI][Rust Frontend] Pin cargo tool versions (#48222)
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
|
2026-07-12 16:34:26 +01:00 |
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f36284a8d2
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[CI] Add TORCH_NIGHTLY=1 build mode (run full suite on torch nightly) (#47180)
Co-authored-by: Andrey Talman <atalman@users.noreply.github.com>
Co-authored-by: Kevin H. Luu <khluu000@gmail.com>
|
2026-07-10 01:38:35 -07:00 |
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216ee58780
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Add XPU nightly and release image publishing to DockerHub (#48126)
Signed-off-by: wenjun.liu <wenjun.liu@intel.com>
Signed-off-by: jun,du <jun.du@intel.com>
Co-authored-by: jun,du <jun.du@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
|
2026-07-10 00:56:00 -07:00 |
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Lucas WilkinsonandGitHub
|
e12b91b032
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[CI] Fix cargo-deny config flag ordering (#48170)
Signed-off-by: Lucas Wilkinson <lwilkins@redhat.com>
|
2026-07-09 21:43:58 +00:00 |
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299d2b5655
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[CI] Annotate built Docker image tags on the Buildkite build page (#48101)
Signed-off-by: khluu <khluu000@gmail.com>
Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
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2026-07-09 22:02:40 +08:00 |
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0206f10871
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Add Intel XPU Docker release pipeline (#47880)
Signed-off-by: wenjun.liu <wenjun.liu@intel.com>
Signed-off-by: jun,du <jun.du@intel.com>
Co-authored-by: jun,du <jun.du@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
|
2026-07-09 01:13:51 -07:00 |
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cbb5f045be
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[ROCm][CI] Refresh ROCm base images when docker rocm_base changes (#46904)
Signed-off-by: Rohan138 <rohanpotdar138@gmail.com>
Signed-off-by: Codex <codex@example.invalid>
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Co-authored-by: Rohan138 <rohanpotdar138@gmail.com>
Co-authored-by: Codex <codex@example.invalid>
Co-authored-by: Micah Williamson <micah.williamson@amd.com>
Co-authored-by: Matthew Wong <Matthew.Wong2@amd.com>
|
2026-07-07 03:10:50 -07:00 |
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Rahul VishwakarmaandGitHub
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9dd2465896
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feat(cpu): add CPU support for Mamba ShortConv (#35059)
Signed-off-by: Rahul Vishwakarma <Rahul.Vishwakarma2@ibm.com>
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2026-07-07 10:47:08 +08:00 |
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Andreas KaratzasandGitHub
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8484ca5d45
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[ROCm][CI] Adding Rust parity (#47478)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-06 15:05:39 -07:00 |
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Nick HillandGitHub
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f676808ba0
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[CI] Use TTY for AMD CI tests for colored buildkite logs (#47730)
Signed-off-by: Nick Hill <nickhill123@gmail.com>
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2026-07-06 20:50:29 +08:00 |
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Fadi ArafehandGitHub
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f1073c050c
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[CPU][BugFix] Multiple fixes to w4a8_int8 CPU MoE path (#46739)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-07-06 05:39:20 +00:00 |
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TresandGitHub
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f006e5a24c
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[CI][AMD] Allow git operations on previously created work trees (#47554)
Signed-off-by: Tres Popp <tres.popp@amd.com>
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2026-07-03 14:41:01 -05:00 |
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xiangdongandGitHub
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3f0b773b30
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[XPU][CI]Mv huggingface cache to larger disk in Intel GPU CI (#47405)
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
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2026-07-03 11:56:17 +08:00 |
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Nick HillandGitHub
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d85601c20f
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[CI] Pin modelscope version to fix test breakage (#47465)
Signed-off-by: Nick Hill <nickhill123@gmail.com>
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2026-07-02 19:33:08 -07:00 |
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34bf7b45a0
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[CI] intel CI: add quantization and awq case for xpu (#46456)
Signed-off-by: wenjun.liu <wenjun.liu@intel.com>
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
Co-authored-by: zengxian <xiangdong.zeng@intel.com>
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2026-07-03 09:51:56 +08:00 |
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Andreas KaratzasandGitHub
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6768fbc76f
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[ROCm][CI] Adding qwen3 dp4 eplb (#47480)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-07-02 17:58:56 -07:00 |
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MattandGitHub
|
3c1396bab6
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[Hardware][AMD][CI] Toggle test coredumps on ROCm debug agent (#47222)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
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2026-06-30 23:30:10 -05:00 |
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MattandGitHub
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a2a92cbbaa
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[Hardware][AMD][CI] Tweak mirrored tests; improve CI base dependency change detection (#46930)
Signed-off-by: Matthew Wong <Matthew.Wong2@amd.com>
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2026-06-28 00:07:14 -07:00 |
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a65f93fb2e
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[ROCm][CI] Add ci_base metadata for external cache orchestration (#46886)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
Signed-off-by: Codex <codex@example.invalid>
Co-authored-by: Codex <codex@example.invalid>
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2026-06-28 12:51:19 +08:00 |
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Li, JiangandGitHub
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abc71548ef
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[CI/Build][CPU] Add test image cache clean-up (#46831)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
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2026-06-26 23:28:49 +08:00 |
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Bugen ZhaoandGitHub
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ae7c8ec223
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[Rust Frontend] Switch rustls to native-tls/OpenSSL (#46696)
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
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2026-06-25 17:19:44 -07:00 |
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92221485aa
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[CPU][CI/Build] Allow more CPU CI agents (#46702)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-25 19:33:39 +08:00 |
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Aarushi JainandGitHub
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cf57311187
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Run DeepSeek-V2-Lite prefetch-offload eval eager on ROCm (#46386)
Signed-off-by: aarushjain29 <Aarushi.Jain2@amd.com>
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2026-06-24 12:25:57 -05:00 |
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Fadi ArafehandGitHub
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061043eaca
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[CPU][Perf] Accelerate unquantized MoE for AArch64 (#46353)
Signed-off-by: Fadi Arafeh <fadi.arafeh@arm.com>
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2026-06-24 14:14:35 +00:00 |
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Kunshang JiandGitHub
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d4448b511d
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[XPU][Docker] switch to ubuntu 24.04 as base image (#45973)
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-06-24 20:39:20 +08:00 |
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568874fec2
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[ROCm][CI] pass merge-base to container for python-only wheel metadata (#45869)
Signed-off-by: Divakar Verma <divakar.verma@amd.com>
Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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2026-06-23 15:44:43 +00:00 |
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xiangdongandGitHub
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b5a2adec4b
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[XPU][CI]Skip v1/spec_decode/test_speculators_correctness.py in intel GPU nightly (#46356)
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
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2026-06-22 19:30:41 +08:00 |
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Micah WilliamsonandGitHub
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f3df7a7231
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[ROCm][CI] Enable kv_connector unit tests on ROCm (#45955)
Signed-off-by: Micah Williamson <micah.williamson@amd.com>
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2026-06-22 05:08:44 +03:00 |
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liuzhenweiandGitHub
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2959a9273a
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[XPU][CI] add model runner v2 into CI (#44650)
Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
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2026-06-18 00:28:34 +00:00 |
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Kunshang JiandGitHub
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ef2c40dc00
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[XPU][CI] fix server test file path (#45870)
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-06-17 09:06:25 +08:00 |
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c69c73418a
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[XPU][CI] add intel xpu cases for nightly CI (#44372)
Signed-off-by: wenjun.liu <wenjun.liu@intel.com>
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
Co-authored-by: zengxian <xiangdong.zeng@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-06-16 16:35:08 +08:00 |
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bd59c913bc
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[CI] ci-fetch-log.sh: fetch all failed jobs from a build URL or PR number (#45274)
Signed-off-by: mgoin <mgoin64@gmail.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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2026-06-12 00:42:18 -07:00 |
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Bugen ZhaoandGitHub
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43914dd743
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[Rust Frontend] Add Python bridge for Rust tool parsers (#44624)
Signed-off-by: Bugen Zhao <i@bugenzhao.com>
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2026-06-11 04:51:06 +00:00 |
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xiangdongandGitHub
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b12e42d132
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[XPU][CI] Refine docker image build and pull/create lock mechanism in Intel GPU CI (#44481)
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
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2026-06-09 20:20:32 +08:00 |
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xiangdongandGitHub
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94fcdd007f
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[XPU][CI] Add more test cases in Intel GPU CI (#43663)
Signed-off-by: zengxian <xiangdong.zeng@intel.com>
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2026-06-08 06:21:24 +00:00 |
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Andreas KaratzasandGitHub
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967c5c3bc3
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[ROCm][CI] Stage C mirrors (#42793)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-06-07 23:00:59 -07:00 |
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