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de92d916fe8a897b00a8adb0aab9ed9ec99f2b6c
vllm/tests/compile/piecewise
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Boyuan FengGitHubHarry Mellor
f57438338d [BugFix] Patch inductor memory plan logic (#26878)
Signed-off-by: Boyuan Feng <boyuan@meta.com>
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
2025-10-15 12:51:45 +00:00
..
__init__.py
[torch.compile] rework compile control with piecewise cudagraph (#9715)
2024-10-29 23:03:49 -07:00
test_full_cudagraph.py
[torch.compile] Fix tests for torch==2.9 inductor partition (#26116)
2025-10-14 19:55:02 -04:00
test_multiple_graphs.py
[BugFix] Patch inductor memory plan logic (#26878)
2025-10-15 12:51:45 +00:00
test_simple.py
[Frontend][torch.compile] CompilationConfig Overhaul (#20283): name change compilation level to compilation mode, deprecation compilation level (#26355)
2025-10-15 02:51:16 +00:00
test_toy_llama.py
[Frontend][torch.compile] CompilationConfig Overhaul (#20283): name change compilation level to compilation mode, deprecation compilation level (#26355)
2025-10-15 02:51:16 +00:00
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