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70749fdcca
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[Feature] Triton INT4 per-token-head KV cache quantization (#40835)
Signed-off-by: JartX <sagformas@epdcenter.es>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-24 10:21:25 +00:00 |
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84f13374b3
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[CI] Fix test_auto_gptq on ROCm CI (#46164)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-23 16:38:06 -05:00 |
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Yan MaandGitHub
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acce57d8dd
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Deprecate old FP8 online MoE quantization class (#44514)
Signed-off-by: Yan Ma <yan.ma@intel.com>
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2026-06-23 11:53:38 -07:00 |
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fxmarty-amdandGitHub
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e368415daa
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[AMD][OCP MX][CI] Fix tests to not dispatch on UNFUSED_TRITON backend on MI300, improve w_mxfp4_a_fp8 emulation support (#46142)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
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2026-06-23 14:25:27 -04:00 |
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fd50a66015
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[CI][ROCm] Skip unsupported test cases on ROCm (#46160)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-23 11:35:49 -05:00 |
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2aaaf3febd
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[ROCm][Test] Fix stale test_gfx950_moe MXFP4 oracle tests (#46260)
Signed-off-by: Spandan Tiwari <23646532+spandantiwari@users.noreply.github.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-23 23:07:46 +08:00 |
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fxmarty-amdandGitHub
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6ead164e52
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[CI] Add TP=4 requirement to test_mixed_precision_model_accuracies (#46161)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
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2026-06-22 18:19:43 -05:00 |
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183b5f27ea
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[Bugfix][V1][TurboQuant] Reserve workspace before CUDA graph capture (#44053)
Signed-off-by: Guipeng Zhang <zhangguipeng23z@ict.ac.cn>
Co-authored-by: Codex <codex@openai.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
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2026-06-22 15:47:48 -07:00 |
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ca5b24695b
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Fix static actorder handling for compressed-tensors WNA16 MoE (#41161)
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-22 15:46:46 -07:00 |
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Liangliang MaandGitHub
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3da4a1b124
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[XPU] add awq format for INCXPULinear (#43404)
Signed-off-by: Ma, Liangliang <liangliang.ma@intel.com>
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2026-06-22 22:29:13 +08:00 |
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ZedongLiuandGitHub
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9c450b1027
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[Kernel][Bugfix] Fix INT8 per-token-head KV cache rounding in Triton reshape-and-cache (#45361)
Signed-off-by: ZedongLiu <113341356+Zedong-Liu@users.noreply.github.com>
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2026-06-21 15:59:40 -04:00 |
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8d4f54966c
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fix(quantization): Fix AWQ dequantize on Intel XPU and refactor AutoAWQ config (#42727)
Signed-off-by: Alex <alex.tech.lab@outlook.com>
Signed-off-by: AlexHuang <jihuihuang@tencent.com>
Co-authored-by: Claude <noreply@anthropic.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-18 20:12:28 +08:00 |
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8dd8b6ed78
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[XPU] Fix FP8 block-scaled scheme selection on non-CUDA platforms (#43958)
Signed-off-by: Lai, Yejing <yejing.lai@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-06-18 10:16:20 +08:00 |
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Wentao YeandGitHub
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2659f60a1a
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[Refactor] Remove dead quantization code and tests (#45454)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
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2026-06-17 16:12:01 -04:00 |
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bcb518ad7a
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[quant][autoround]Refactor INC quantization into package with INCScheme orchestrator (#40601)
Signed-off-by: yiliu30 <yi4.liu@intel.com>
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Signed-off-by: Zhenzhong Xu <zhenzhong.xu@intel.com>
Co-authored-by: n1ck-guo <heng.guo@intel.com>
Co-authored-by: Zhenzhong1 <zhenzhong.xu@intel.com>
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2026-06-17 21:51:32 +08:00 |
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c5e5c33fcd
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[Bugfix][MoE] Restore routed output unpadding before shared expert add (#45707)
Signed-off-by: Netanel Haber <58652339+netanel-haber@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-16 16:06:28 +03:00 |
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3f53e2138f
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[Refactor] Remove Fp8OnlineLinearMethod as scheduled (#45463)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-16 04:35:58 -07:00 |
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RoyWangandGitHub
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a3195fab7b
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[AMD][Bugfix][Quantization] Honor fused-name match in is_layer_skipped (#43981)
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2026-06-15 09:37:52 -07:00 |
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Yuwen ZhouandGitHub
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0cd9b7af25
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[CPU] Support CPU W4A16 INT4 MoE (#43409)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
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2026-06-12 07:12:37 +00:00 |
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Harry MellorandGitHub
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03878d1c22
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Deprecations for v0.23 and v0.24 (#44992)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2026-06-11 14:35:38 +00:00 |
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bnellnmandGitHub
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dc68bd8c41
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[MoE Refactor] FusedMoE/MoERunner inversion refactor (#41184)
Signed-off-by: Bill Nell <bnell@redhat.com>
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2026-06-08 10:42:58 -04:00 |
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753e9d55e6
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[Quantization] add online fp8 ptpc (#44132)
Signed-off-by: walterbm <walter.beller.morales@gmail.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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2026-06-08 22:42:11 +08:00 |
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Dipika SikkaandGitHub
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e68988a248
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Refactor CT NVFP4 linear to use a single class (#42443)
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2026-06-04 08:25:08 -04:00 |
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3099de3617
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[Kernel][MoE] Add GELU_TANH to CPU, CUTLASS, and WNA16 MoE backends (#42027)
Signed-off-by: lesj0610 <lesj0610@users.noreply.github.com>
Co-authored-by: lesj0610 <lesj0610@users.noreply.github.com>
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2026-06-02 17:12:08 -04:00 |
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Wei-Ming ChenandGitHub
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6f5b533241
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Add LM head quantization support for ModelOpt (#42124)
Signed-off-by: weimingc <17592131+meenchen@users.noreply.github.com>
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2026-05-26 09:21:05 -07:00 |
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Hank_andGitHub
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b3269454b1
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[chores][log] change registry log from warning to debug (#43045)
Signed-off-by: Hank <hcc.mayday@gmail.com>
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2026-05-26 00:13:46 -07:00 |
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Juhi MittalandGitHub
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e203006a8b
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[Quantization][ModelOpt] W4A16 NVFP4 fused MoE + mixed-precision dispatch (#42566)
Signed-off-by: Juhi Mittal <juhim@nvidia.com>
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2026-05-22 20:51:49 +00:00 |
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68e07d5916
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[Bug] Fix ci issue assert output_size is not None AssertionError (#43261)
Signed-off-by: yewentao256 <zhyanwentao@126.com>
Signed-off-by: Isotr0py <Isotr0py@outlook.com>
Co-authored-by: Isotr0py <Isotr0py@outlook.com>
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2026-05-21 16:58:09 +08:00 |
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Dipika SikkaandGitHub
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df84fb07a6
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Remove additional dead code as a follow-up to #42889 (#43144)
Signed-off-by: Dipika Sikka <dipikasikka1@gmail.com>
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2026-05-20 10:01:45 -04:00 |
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Bowen BaoandGitHub
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a2c8fc6657
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[ROCm][Quantization][3/N] Refactor quark_moe w4a4 w/ oracle (#41436)
Signed-off-by: Bowen Bao <bowenbao@amd.com>
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2026-05-18 13:46:13 -04:00 |
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Yuwen ZhouandGitHub
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88a860d754
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[CPU] Add MXFP4 W4A16 MoE support (#41922)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
Signed-off-by: Yuwen Zhou <yuwen.zhou@intel.com>
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2026-05-18 03:04:45 -07:00 |
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fa2a33b893
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[Quant] Consolidate GPTQ: rename gptq_marlin.py to auto_gptq.py (#38288)
Signed-off-by: Chengyi Nie <cnie@roblox.com>
Co-authored-by: Chengyi Nie <cnie@roblox.com>
Co-authored-by: Cursor <cursoragent@cursor.com>
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2026-05-15 08:25:52 +08:00 |
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Michael GoinandGitHub
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8efd508204
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[Quantization] Rework quantization_config to use QuantKey and allow for activation override (#41566)
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2026-05-13 16:58:32 -04:00 |
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40330967ab
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[Quark] Support loading Quark NVFP4 checkpoints in vLLM (#35859)
Signed-off-by: Felix Marty <Felix.Marty@amd.com>
Signed-off-by: fxmarty-amd <felmarty@amd.com>
Co-authored-by: Kyle Sayers <kylesayrs@gmail.com>
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2026-05-13 11:17:36 -07:00 |
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hissu-hyvarinenandGitHub
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0a62f5eec9
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[AMD] skip machete tests for rocm (#42326)
Signed-off-by: Hissu Hyvarinen <hissu.hyvarinen@amd.com>
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2026-05-13 12:11:03 +00:00 |
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Dipika SikkaandGitHub
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a7b801e26d
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[MXFP4] Support for linear layers + compressed-tensors integration (#41664)
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2026-05-12 07:49:33 -04:00 |
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Juhi MittalandGitHub
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7a2b596982
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[Quantization] Add ModelOpt NVFP4 W4A16 (4-bit weights, fp16/bf16 activations) support (#41769)
Signed-off-by: Juhi Mittal <juhim@nvidia.com>
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2026-05-09 21:15:50 +00:00 |
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Kyle SayersandGitHub
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c1819ca283
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[Compressed Tensors] Allow configs with non-explicit ignores (#41965)
Signed-off-by: Kyle Sayers <kylesayrs@gmail.com>
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2026-05-07 14:03:45 -07:00 |
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Yuwen ZhouandGitHub
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713b28bd0b
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[CPU] Add FP8 W8A16 MoE support (#41314)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
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2026-05-06 23:17:07 -07:00 |
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Yuwen ZhouandGitHub
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809b98e5b7
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[CPU] Add FP8 W8A16 linear support (#41186)
Signed-off-by: yuwenzho <yuwen.zhou@intel.com>
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2026-05-06 07:05:27 +00:00 |
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4f2af1a7c0
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[Feature] TurboQuant: support hybrid models and uniform quantization (#39931)
Signed-off-by: JartX <sagformas@epdcenter.es>
Signed-off-by: Jim Smith <jhsmith0@me.com>
Co-authored-by: Jim Smith <jhsmith0@me.com>
Co-authored-by: Sandermage <sandermage@users.noreply.github.com>
Co-authored-by: Claude <noreply@anthropic.com>
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2026-05-04 20:14:01 -04:00 |
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Andreas KaratzasandGitHub
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6ec9bbec38
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[CI] Stabilize cpu offload compressed tensors test (#41102)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-05-04 05:22:42 +00:00 |
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Hemanth AcharyaandGitHub
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6841f5dc77
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[ROCm] Add env flags to disable dynamic MXFP4 quant and enable AITER tuned GEMMs for Attention Projection Layers (#39987)
Signed-off-by: Hemanth Acharya <heachary@amd.com>
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2026-04-29 16:07:46 -07:00 |
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Andreas KaratzasandGitHub
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5e2c37facd
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[ROCm][CI] Add missing quantization methods and fix online quant test failures (#39801)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-04-27 15:08:57 -05:00 |
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ojhaanshikaandGitHub
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592ae6805c
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Cutlass W4A16 (Machete) Tests (#35450)
Signed-off-by: Anshika Ojha <anshikao@nvidia.com>
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2026-04-27 05:15:29 +00:00 |
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Andreas KaratzasandGitHub
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a943839e9a
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[ROCm][CI] Introducing new MI300 nodes (#39531)
Signed-off-by: Andreas Karatzas <akaratza@amd.com>
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2026-04-20 16:09:58 +08:00 |
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Dan AlistarhandGitHub
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ed0622e3a8
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[Attention] TurboQuant: remove redundant random signs, add prior art attribution (#40194)
Signed-off-by: Dan Alistarh <d.alistarh@gmail.com>
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2026-04-18 14:31:59 -04:00 |
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251c18d1f8
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skip fp8e4b15 on xpu (#39957)
Signed-off-by: Xinyu Chen <xinyu1.chen@intel.com>
Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
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2026-04-17 16:55:08 +00:00 |
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Asaf GardinandGitHub
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ad2b1277f9
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[Quantization] Consolidate experts_int8 with fp8 online quantization (#38463)
Signed-off-by: Josephasafg <ajgard7@gmail.com>
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2026-04-16 13:12:20 -07:00 |
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Zhenzhong XuandGitHub
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60995c05b4
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[Quantization][Autoround][CPU] Add W4A16 Support (#38192)
Signed-off-by: Zhenzhong1 <zhenzhong.xu@intel.com>
Signed-off-by: Zhenzhong Xu <zhenzhong.xu@intel.com>
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2026-04-15 18:38:31 +08:00 |
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